e89372951d
It is currently not possible to run a pseries-2.12 or older machine with HV KVM. QEMU prints the following and exits right away. qemu-system-ppc64: KVM doesn't support for base page shift 34 The "hpt-max-page-size" capability was recently added to spapr to hide host configuration details from HPT mode guests. Its default value for newer machine types is 64k. For backwards compatibility, pseries-2.12 and older machine types need a different value. This is handled as usual in a class init function. The default value is 16G, ie, all page sizes supported by POWER7 and newer CPUs, but HV KVM requires guest pages to be hpa contiguous as well as gpa contiguous. The default value is the page size used to back the guest RAM in this case. Unfortunately kvmppc_hpt_needs_host_contiguous_pages()->kvm_enabled() is called way before KVM init and returns false, even if the user requested KVM. We thus end up selecting 16G, which isn't supported by HV KVM. The default value must be set during machine init, because we can safely assume that KVM is initialized at this point. We fix this by moving the logic to default_caps_with_cpu(). Since the user cannot pass cap-hpt-max-page-size=0, we set the default to 0 in the pseries-2.12 class init function and use that as a flag to do the real work. Signed-off-by: Greg Kurz <groug@kaod.org> Reviewed-by: Eduardo Habkost <ehabkost@redhat.com> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
646 lines
21 KiB
C
646 lines
21 KiB
C
/*
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* QEMU PowerPC pSeries Logical Partition capabilities handling
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*
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* Copyright (c) 2017 David Gibson, Red Hat Inc.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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* THE SOFTWARE.
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*/
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#include "qemu/osdep.h"
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#include "qemu/error-report.h"
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#include "qapi/error.h"
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#include "qapi/visitor.h"
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#include "sysemu/hw_accel.h"
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#include "exec/ram_addr.h"
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#include "target/ppc/cpu.h"
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#include "target/ppc/mmu-hash64.h"
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#include "cpu-models.h"
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#include "kvm_ppc.h"
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#include "hw/ppc/spapr.h"
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typedef struct sPAPRCapPossible {
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int num; /* size of vals array below */
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const char *help; /* help text for vals */
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/*
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* Note:
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* - because of the way compatibility is determined vals MUST be ordered
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* such that later options are a superset of all preceding options.
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* - the order of vals must be preserved, that is their index is important,
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* however vals may be added to the end of the list so long as the above
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* point is observed
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*/
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const char *vals[];
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} sPAPRCapPossible;
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typedef struct sPAPRCapabilityInfo {
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const char *name;
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const char *description;
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int index;
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/* Getter and Setter Function Pointers */
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ObjectPropertyAccessor *get;
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ObjectPropertyAccessor *set;
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const char *type;
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/* Possible values if this is a custom string type */
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sPAPRCapPossible *possible;
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/* Make sure the virtual hardware can support this capability */
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void (*apply)(sPAPRMachineState *spapr, uint8_t val, Error **errp);
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void (*cpu_apply)(sPAPRMachineState *spapr, PowerPCCPU *cpu,
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uint8_t val, Error **errp);
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} sPAPRCapabilityInfo;
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static void spapr_cap_get_bool(Object *obj, Visitor *v, const char *name,
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void *opaque, Error **errp)
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{
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sPAPRCapabilityInfo *cap = opaque;
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sPAPRMachineState *spapr = SPAPR_MACHINE(obj);
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bool value = spapr_get_cap(spapr, cap->index) == SPAPR_CAP_ON;
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visit_type_bool(v, name, &value, errp);
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}
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static void spapr_cap_set_bool(Object *obj, Visitor *v, const char *name,
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void *opaque, Error **errp)
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{
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sPAPRCapabilityInfo *cap = opaque;
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sPAPRMachineState *spapr = SPAPR_MACHINE(obj);
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bool value;
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Error *local_err = NULL;
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visit_type_bool(v, name, &value, &local_err);
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if (local_err) {
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error_propagate(errp, local_err);
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return;
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}
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spapr->cmd_line_caps[cap->index] = true;
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spapr->eff.caps[cap->index] = value ? SPAPR_CAP_ON : SPAPR_CAP_OFF;
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}
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static void spapr_cap_get_string(Object *obj, Visitor *v, const char *name,
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void *opaque, Error **errp)
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{
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sPAPRCapabilityInfo *cap = opaque;
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sPAPRMachineState *spapr = SPAPR_MACHINE(obj);
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char *val = NULL;
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uint8_t value = spapr_get_cap(spapr, cap->index);
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if (value >= cap->possible->num) {
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error_setg(errp, "Invalid value (%d) for cap-%s", value, cap->name);
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return;
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}
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val = g_strdup(cap->possible->vals[value]);
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visit_type_str(v, name, &val, errp);
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g_free(val);
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}
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static void spapr_cap_set_string(Object *obj, Visitor *v, const char *name,
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void *opaque, Error **errp)
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{
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sPAPRCapabilityInfo *cap = opaque;
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sPAPRMachineState *spapr = SPAPR_MACHINE(obj);
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Error *local_err = NULL;
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uint8_t i;
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char *val;
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visit_type_str(v, name, &val, &local_err);
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if (local_err) {
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error_propagate(errp, local_err);
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return;
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}
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if (!strcmp(val, "?")) {
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error_setg(errp, "%s", cap->possible->help);
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goto out;
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}
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for (i = 0; i < cap->possible->num; i++) {
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if (!strcasecmp(val, cap->possible->vals[i])) {
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spapr->cmd_line_caps[cap->index] = true;
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spapr->eff.caps[cap->index] = i;
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goto out;
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}
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}
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error_setg(errp, "Invalid capability mode \"%s\" for cap-%s", val,
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cap->name);
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out:
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g_free(val);
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}
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static void spapr_cap_get_pagesize(Object *obj, Visitor *v, const char *name,
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void *opaque, Error **errp)
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{
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sPAPRCapabilityInfo *cap = opaque;
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sPAPRMachineState *spapr = SPAPR_MACHINE(obj);
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uint8_t val = spapr_get_cap(spapr, cap->index);
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uint64_t pagesize = (1ULL << val);
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visit_type_size(v, name, &pagesize, errp);
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}
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static void spapr_cap_set_pagesize(Object *obj, Visitor *v, const char *name,
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void *opaque, Error **errp)
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{
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sPAPRCapabilityInfo *cap = opaque;
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sPAPRMachineState *spapr = SPAPR_MACHINE(obj);
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uint64_t pagesize;
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uint8_t val;
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Error *local_err = NULL;
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visit_type_size(v, name, &pagesize, &local_err);
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if (local_err) {
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error_propagate(errp, local_err);
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return;
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}
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if (!is_power_of_2(pagesize)) {
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error_setg(errp, "cap-%s must be a power of 2", cap->name);
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return;
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}
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val = ctz64(pagesize);
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spapr->cmd_line_caps[cap->index] = true;
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spapr->eff.caps[cap->index] = val;
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}
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static void cap_htm_apply(sPAPRMachineState *spapr, uint8_t val, Error **errp)
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{
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if (!val) {
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/* TODO: We don't support disabling htm yet */
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return;
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}
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if (tcg_enabled()) {
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error_setg(errp,
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"No Transactional Memory support in TCG, try cap-htm=off");
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} else if (kvm_enabled() && !kvmppc_has_cap_htm()) {
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error_setg(errp,
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"KVM implementation does not support Transactional Memory, try cap-htm=off"
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);
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}
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}
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static void cap_vsx_apply(sPAPRMachineState *spapr, uint8_t val, Error **errp)
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{
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PowerPCCPU *cpu = POWERPC_CPU(first_cpu);
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CPUPPCState *env = &cpu->env;
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if (!val) {
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/* TODO: We don't support disabling vsx yet */
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return;
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}
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/* Allowable CPUs in spapr_cpu_core.c should already have gotten
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* rid of anything that doesn't do VMX */
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g_assert(env->insns_flags & PPC_ALTIVEC);
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if (!(env->insns_flags2 & PPC2_VSX)) {
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error_setg(errp, "VSX support not available, try cap-vsx=off");
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}
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}
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static void cap_dfp_apply(sPAPRMachineState *spapr, uint8_t val, Error **errp)
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{
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PowerPCCPU *cpu = POWERPC_CPU(first_cpu);
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CPUPPCState *env = &cpu->env;
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if (!val) {
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/* TODO: We don't support disabling dfp yet */
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return;
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}
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if (!(env->insns_flags2 & PPC2_DFP)) {
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error_setg(errp, "DFP support not available, try cap-dfp=off");
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}
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}
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sPAPRCapPossible cap_cfpc_possible = {
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.num = 3,
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.vals = {"broken", "workaround", "fixed"},
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.help = "broken - no protection, workaround - workaround available,"
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" fixed - fixed in hardware",
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};
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static void cap_safe_cache_apply(sPAPRMachineState *spapr, uint8_t val,
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Error **errp)
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{
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uint8_t kvm_val = kvmppc_get_cap_safe_cache();
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if (tcg_enabled() && val) {
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/* TODO - for now only allow broken for TCG */
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error_setg(errp,
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"Requested safe cache capability level not supported by tcg, try a different value for cap-cfpc");
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} else if (kvm_enabled() && (val > kvm_val)) {
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error_setg(errp,
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"Requested safe cache capability level not supported by kvm, try cap-cfpc=%s",
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cap_cfpc_possible.vals[kvm_val]);
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}
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}
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sPAPRCapPossible cap_sbbc_possible = {
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.num = 3,
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.vals = {"broken", "workaround", "fixed"},
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.help = "broken - no protection, workaround - workaround available,"
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" fixed - fixed in hardware",
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};
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static void cap_safe_bounds_check_apply(sPAPRMachineState *spapr, uint8_t val,
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Error **errp)
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{
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uint8_t kvm_val = kvmppc_get_cap_safe_bounds_check();
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if (tcg_enabled() && val) {
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/* TODO - for now only allow broken for TCG */
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error_setg(errp,
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"Requested safe bounds check capability level not supported by tcg, try a different value for cap-sbbc");
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} else if (kvm_enabled() && (val > kvm_val)) {
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error_setg(errp,
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"Requested safe bounds check capability level not supported by kvm, try cap-sbbc=%s",
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cap_sbbc_possible.vals[kvm_val]);
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}
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}
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sPAPRCapPossible cap_ibs_possible = {
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.num = 4,
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/* Note workaround only maintained for compatibility */
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.vals = {"broken", "workaround", "fixed-ibs", "fixed-ccd"},
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.help = "broken - no protection, fixed-ibs - indirect branch serialisation,"
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" fixed-ccd - cache count disabled",
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};
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static void cap_safe_indirect_branch_apply(sPAPRMachineState *spapr,
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uint8_t val, Error **errp)
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{
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uint8_t kvm_val = kvmppc_get_cap_safe_indirect_branch();
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if (val == SPAPR_CAP_WORKAROUND) { /* Can only be Broken or Fixed */
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error_setg(errp,
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"Requested safe indirect branch capability level \"workaround\" not valid, try cap-ibs=%s",
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cap_ibs_possible.vals[kvm_val]);
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} else if (tcg_enabled() && val) {
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/* TODO - for now only allow broken for TCG */
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error_setg(errp,
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"Requested safe indirect branch capability level not supported by tcg, try a different value for cap-ibs");
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} else if (kvm_enabled() && val && (val != kvm_val)) {
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error_setg(errp,
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"Requested safe indirect branch capability level not supported by kvm, try cap-ibs=%s",
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cap_ibs_possible.vals[kvm_val]);
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}
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}
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#define VALUE_DESC_TRISTATE " (broken, workaround, fixed)"
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void spapr_check_pagesize(sPAPRMachineState *spapr, hwaddr pagesize,
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Error **errp)
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{
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hwaddr maxpagesize = (1ULL << spapr->eff.caps[SPAPR_CAP_HPT_MAXPAGESIZE]);
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if (!kvmppc_hpt_needs_host_contiguous_pages()) {
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return;
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}
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if (maxpagesize > pagesize) {
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error_setg(errp,
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"Can't support %"HWADDR_PRIu" kiB guest pages with %"
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HWADDR_PRIu" kiB host pages with this KVM implementation",
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maxpagesize >> 10, pagesize >> 10);
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}
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}
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static void cap_hpt_maxpagesize_apply(sPAPRMachineState *spapr,
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uint8_t val, Error **errp)
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{
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if (val < 12) {
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error_setg(errp, "Require at least 4kiB hpt-max-page-size");
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return;
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} else if (val < 16) {
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warn_report("Many guests require at least 64kiB hpt-max-page-size");
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}
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spapr_check_pagesize(spapr, qemu_getrampagesize(), errp);
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}
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static bool spapr_pagesize_cb(void *opaque, uint32_t seg_pshift,
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uint32_t pshift)
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{
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unsigned maxshift = *((unsigned *)opaque);
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assert(pshift >= seg_pshift);
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/* Don't allow the guest to use pages bigger than the configured
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* maximum size */
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if (pshift > maxshift) {
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return false;
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}
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/* For whatever reason, KVM doesn't allow multiple pagesizes
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* within a segment, *except* for the case of 16M pages in a 4k or
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* 64k segment. Always exclude other cases, so that TCG and KVM
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* guests see a consistent environment */
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if ((pshift != seg_pshift) && (pshift != 24)) {
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return false;
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}
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return true;
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}
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static void cap_hpt_maxpagesize_cpu_apply(sPAPRMachineState *spapr,
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PowerPCCPU *cpu,
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uint8_t val, Error **errp)
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{
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unsigned maxshift = val;
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ppc_hash64_filter_pagesizes(cpu, spapr_pagesize_cb, &maxshift);
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}
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sPAPRCapabilityInfo capability_table[SPAPR_CAP_NUM] = {
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[SPAPR_CAP_HTM] = {
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.name = "htm",
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.description = "Allow Hardware Transactional Memory (HTM)",
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.index = SPAPR_CAP_HTM,
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.get = spapr_cap_get_bool,
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.set = spapr_cap_set_bool,
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.type = "bool",
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.apply = cap_htm_apply,
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},
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[SPAPR_CAP_VSX] = {
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.name = "vsx",
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.description = "Allow Vector Scalar Extensions (VSX)",
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.index = SPAPR_CAP_VSX,
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.get = spapr_cap_get_bool,
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.set = spapr_cap_set_bool,
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.type = "bool",
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.apply = cap_vsx_apply,
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},
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[SPAPR_CAP_DFP] = {
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.name = "dfp",
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.description = "Allow Decimal Floating Point (DFP)",
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.index = SPAPR_CAP_DFP,
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.get = spapr_cap_get_bool,
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.set = spapr_cap_set_bool,
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.type = "bool",
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.apply = cap_dfp_apply,
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},
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[SPAPR_CAP_CFPC] = {
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.name = "cfpc",
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.description = "Cache Flush on Privilege Change" VALUE_DESC_TRISTATE,
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.index = SPAPR_CAP_CFPC,
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.get = spapr_cap_get_string,
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.set = spapr_cap_set_string,
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.type = "string",
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.possible = &cap_cfpc_possible,
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.apply = cap_safe_cache_apply,
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},
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[SPAPR_CAP_SBBC] = {
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.name = "sbbc",
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.description = "Speculation Barrier Bounds Checking" VALUE_DESC_TRISTATE,
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.index = SPAPR_CAP_SBBC,
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.get = spapr_cap_get_string,
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.set = spapr_cap_set_string,
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.type = "string",
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.possible = &cap_sbbc_possible,
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.apply = cap_safe_bounds_check_apply,
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},
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[SPAPR_CAP_IBS] = {
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.name = "ibs",
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.description =
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"Indirect Branch Speculation (broken, fixed-ibs, fixed-ccd)",
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.index = SPAPR_CAP_IBS,
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.get = spapr_cap_get_string,
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.set = spapr_cap_set_string,
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.type = "string",
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.possible = &cap_ibs_possible,
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.apply = cap_safe_indirect_branch_apply,
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},
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[SPAPR_CAP_HPT_MAXPAGESIZE] = {
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.name = "hpt-max-page-size",
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.description = "Maximum page size for Hash Page Table guests",
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.index = SPAPR_CAP_HPT_MAXPAGESIZE,
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.get = spapr_cap_get_pagesize,
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.set = spapr_cap_set_pagesize,
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.type = "int",
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.apply = cap_hpt_maxpagesize_apply,
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.cpu_apply = cap_hpt_maxpagesize_cpu_apply,
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},
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};
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static sPAPRCapabilities default_caps_with_cpu(sPAPRMachineState *spapr,
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const char *cputype)
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{
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sPAPRMachineClass *smc = SPAPR_MACHINE_GET_CLASS(spapr);
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sPAPRCapabilities caps;
|
|
|
|
caps = smc->default_caps;
|
|
|
|
if (!ppc_type_check_compat(cputype, CPU_POWERPC_LOGICAL_2_07,
|
|
0, spapr->max_compat_pvr)) {
|
|
caps.caps[SPAPR_CAP_HTM] = SPAPR_CAP_OFF;
|
|
caps.caps[SPAPR_CAP_CFPC] = SPAPR_CAP_BROKEN;
|
|
}
|
|
|
|
if (!ppc_type_check_compat(cputype, CPU_POWERPC_LOGICAL_2_06_PLUS,
|
|
0, spapr->max_compat_pvr)) {
|
|
caps.caps[SPAPR_CAP_SBBC] = SPAPR_CAP_BROKEN;
|
|
}
|
|
|
|
if (!ppc_type_check_compat(cputype, CPU_POWERPC_LOGICAL_2_06,
|
|
0, spapr->max_compat_pvr)) {
|
|
caps.caps[SPAPR_CAP_VSX] = SPAPR_CAP_OFF;
|
|
caps.caps[SPAPR_CAP_DFP] = SPAPR_CAP_OFF;
|
|
caps.caps[SPAPR_CAP_IBS] = SPAPR_CAP_BROKEN;
|
|
}
|
|
|
|
/* This is for pseries-2.12 and older */
|
|
if (smc->default_caps.caps[SPAPR_CAP_HPT_MAXPAGESIZE] == 0) {
|
|
uint8_t mps;
|
|
|
|
if (kvmppc_hpt_needs_host_contiguous_pages()) {
|
|
mps = ctz64(qemu_getrampagesize());
|
|
} else {
|
|
mps = 34; /* allow everything up to 16GiB, i.e. everything */
|
|
}
|
|
|
|
caps.caps[SPAPR_CAP_HPT_MAXPAGESIZE] = mps;
|
|
}
|
|
|
|
return caps;
|
|
}
|
|
|
|
int spapr_caps_pre_load(void *opaque)
|
|
{
|
|
sPAPRMachineState *spapr = opaque;
|
|
|
|
/* Set to default so we can tell if this came in with the migration */
|
|
spapr->mig = spapr->def;
|
|
return 0;
|
|
}
|
|
|
|
int spapr_caps_pre_save(void *opaque)
|
|
{
|
|
sPAPRMachineState *spapr = opaque;
|
|
|
|
spapr->mig = spapr->eff;
|
|
return 0;
|
|
}
|
|
|
|
/* This has to be called from the top-level spapr post_load, not the
|
|
* caps specific one. Otherwise it wouldn't be called when the source
|
|
* caps are all defaults, which could still conflict with overridden
|
|
* caps on the destination */
|
|
int spapr_caps_post_migration(sPAPRMachineState *spapr)
|
|
{
|
|
int i;
|
|
bool ok = true;
|
|
sPAPRCapabilities dstcaps = spapr->eff;
|
|
sPAPRCapabilities srccaps;
|
|
|
|
srccaps = default_caps_with_cpu(spapr, MACHINE(spapr)->cpu_type);
|
|
for (i = 0; i < SPAPR_CAP_NUM; i++) {
|
|
/* If not default value then assume came in with the migration */
|
|
if (spapr->mig.caps[i] != spapr->def.caps[i]) {
|
|
srccaps.caps[i] = spapr->mig.caps[i];
|
|
}
|
|
}
|
|
|
|
for (i = 0; i < SPAPR_CAP_NUM; i++) {
|
|
sPAPRCapabilityInfo *info = &capability_table[i];
|
|
|
|
if (srccaps.caps[i] > dstcaps.caps[i]) {
|
|
error_report("cap-%s higher level (%d) in incoming stream than on destination (%d)",
|
|
info->name, srccaps.caps[i], dstcaps.caps[i]);
|
|
ok = false;
|
|
}
|
|
|
|
if (srccaps.caps[i] < dstcaps.caps[i]) {
|
|
warn_report("cap-%s lower level (%d) in incoming stream than on destination (%d)",
|
|
info->name, srccaps.caps[i], dstcaps.caps[i]);
|
|
}
|
|
}
|
|
|
|
return ok ? 0 : -EINVAL;
|
|
}
|
|
|
|
/* Used to generate the migration field and needed function for a spapr cap */
|
|
#define SPAPR_CAP_MIG_STATE(sname, cap) \
|
|
static bool spapr_cap_##sname##_needed(void *opaque) \
|
|
{ \
|
|
sPAPRMachineState *spapr = opaque; \
|
|
\
|
|
return spapr->cmd_line_caps[cap] && \
|
|
(spapr->eff.caps[cap] != \
|
|
spapr->def.caps[cap]); \
|
|
} \
|
|
\
|
|
const VMStateDescription vmstate_spapr_cap_##sname = { \
|
|
.name = "spapr/cap/" #sname, \
|
|
.version_id = 1, \
|
|
.minimum_version_id = 1, \
|
|
.needed = spapr_cap_##sname##_needed, \
|
|
.fields = (VMStateField[]) { \
|
|
VMSTATE_UINT8(mig.caps[cap], \
|
|
sPAPRMachineState), \
|
|
VMSTATE_END_OF_LIST() \
|
|
}, \
|
|
}
|
|
|
|
SPAPR_CAP_MIG_STATE(htm, SPAPR_CAP_HTM);
|
|
SPAPR_CAP_MIG_STATE(vsx, SPAPR_CAP_VSX);
|
|
SPAPR_CAP_MIG_STATE(dfp, SPAPR_CAP_DFP);
|
|
SPAPR_CAP_MIG_STATE(cfpc, SPAPR_CAP_CFPC);
|
|
SPAPR_CAP_MIG_STATE(sbbc, SPAPR_CAP_SBBC);
|
|
SPAPR_CAP_MIG_STATE(ibs, SPAPR_CAP_IBS);
|
|
|
|
void spapr_caps_init(sPAPRMachineState *spapr)
|
|
{
|
|
sPAPRCapabilities default_caps;
|
|
int i;
|
|
|
|
/* Compute the actual set of caps we should run with */
|
|
default_caps = default_caps_with_cpu(spapr, MACHINE(spapr)->cpu_type);
|
|
|
|
for (i = 0; i < SPAPR_CAP_NUM; i++) {
|
|
/* Store the defaults */
|
|
spapr->def.caps[i] = default_caps.caps[i];
|
|
/* If not set on the command line then apply the default value */
|
|
if (!spapr->cmd_line_caps[i]) {
|
|
spapr->eff.caps[i] = default_caps.caps[i];
|
|
}
|
|
}
|
|
}
|
|
|
|
void spapr_caps_apply(sPAPRMachineState *spapr)
|
|
{
|
|
int i;
|
|
|
|
for (i = 0; i < SPAPR_CAP_NUM; i++) {
|
|
sPAPRCapabilityInfo *info = &capability_table[i];
|
|
|
|
/*
|
|
* If the apply function can't set the desired level and thinks it's
|
|
* fatal, it should cause that.
|
|
*/
|
|
info->apply(spapr, spapr->eff.caps[i], &error_fatal);
|
|
}
|
|
}
|
|
|
|
void spapr_caps_cpu_apply(sPAPRMachineState *spapr, PowerPCCPU *cpu)
|
|
{
|
|
int i;
|
|
|
|
for (i = 0; i < SPAPR_CAP_NUM; i++) {
|
|
sPAPRCapabilityInfo *info = &capability_table[i];
|
|
|
|
/*
|
|
* If the apply function can't set the desired level and thinks it's
|
|
* fatal, it should cause that.
|
|
*/
|
|
if (info->cpu_apply) {
|
|
info->cpu_apply(spapr, cpu, spapr->eff.caps[i], &error_fatal);
|
|
}
|
|
}
|
|
}
|
|
|
|
void spapr_caps_add_properties(sPAPRMachineClass *smc, Error **errp)
|
|
{
|
|
Error *local_err = NULL;
|
|
ObjectClass *klass = OBJECT_CLASS(smc);
|
|
int i;
|
|
|
|
for (i = 0; i < ARRAY_SIZE(capability_table); i++) {
|
|
sPAPRCapabilityInfo *cap = &capability_table[i];
|
|
const char *name = g_strdup_printf("cap-%s", cap->name);
|
|
char *desc;
|
|
|
|
object_class_property_add(klass, name, cap->type,
|
|
cap->get, cap->set,
|
|
NULL, cap, &local_err);
|
|
if (local_err) {
|
|
error_propagate(errp, local_err);
|
|
return;
|
|
}
|
|
|
|
desc = g_strdup_printf("%s", cap->description);
|
|
object_class_property_set_description(klass, name, desc, &local_err);
|
|
g_free(desc);
|
|
if (local_err) {
|
|
error_propagate(errp, local_err);
|
|
return;
|
|
}
|
|
}
|
|
}
|