30d6ff662d
Hyper-V TLFS specifies this enlightenment as: "NoNonArchitecturalCoreSharing - Indicates that a virtual processor will never share a physical core with another virtual processor, except for virtual processors that are reported as sibling SMT threads. This can be used as an optimization to avoid the performance overhead of STIBP". However, STIBP is not the only implication. It was found that Hyper-V on KVM doesn't pass MD_CLEAR bit to its guests if it doesn't see NoNonArchitecturalCoreSharing bit. KVM reports NoNonArchitecturalCoreSharing in KVM_GET_SUPPORTED_HV_CPUID to indicate that SMT on the host is impossible (not supported of forcefully disabled). Implement NoNonArchitecturalCoreSharing support in QEMU as tristate: 'off' - the feature is disabled (default) 'on' - the feature is enabled. This is only safe if vCPUS are properly pinned and correct topology is exposed. As CPU pinning is done outside of QEMU the enablement decision will be made on a higher level. 'auto' - copy KVM setting. As during live migration SMT settings on the source and destination host may differ this requires us to add a migration blocker. Signed-off-by: Vitaly Kuznetsov <vkuznets@redhat.com> Message-Id: <20191018163908.10246-1-vkuznets@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
215 lines
9.3 KiB
Plaintext
215 lines
9.3 KiB
Plaintext
Hyper-V Enlightenments
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======================
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1. Description
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===============
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In some cases when implementing a hardware interface in software is slow, KVM
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implements its own paravirtualized interfaces. This works well for Linux as
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guest support for such features is added simultaneously with the feature itself.
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It may, however, be hard-to-impossible to add support for these interfaces to
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proprietary OSes, namely, Microsoft Windows.
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KVM on x86 implements Hyper-V Enlightenments for Windows guests. These features
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make Windows and Hyper-V guests think they're running on top of a Hyper-V
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compatible hypervisor and use Hyper-V specific features.
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2. Setup
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=========
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No Hyper-V enlightenments are enabled by default by either KVM or QEMU. In
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QEMU, individual enlightenments can be enabled through CPU flags, e.g:
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qemu-system-x86_64 --enable-kvm --cpu host,hv_relaxed,hv_vpindex,hv_time, ...
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Sometimes there are dependencies between enlightenments, QEMU is supposed to
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check that the supplied configuration is sane.
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When any set of the Hyper-V enlightenments is enabled, QEMU changes hypervisor
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identification (CPUID 0x40000000..0x4000000A) to Hyper-V. KVM identification
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and features are kept in leaves 0x40000100..0x40000101.
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3. Existing enlightenments
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===========================
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3.1. hv-relaxed
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================
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This feature tells guest OS to disable watchdog timeouts as it is running on a
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hypervisor. It is known that some Windows versions will do this even when they
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see 'hypervisor' CPU flag.
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3.2. hv-vapic
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==============
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Provides so-called VP Assist page MSR to guest allowing it to work with APIC
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more efficiently. In particular, this enlightenment allows paravirtualized
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(exit-less) EOI processing.
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3.3. hv-spinlocks=xxx
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======================
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Enables paravirtualized spinlocks. The parameter indicates how many times
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spinlock acquisition should be attempted before indicating the situation to the
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hypervisor. A special value 0xffffffff indicates "never to retry".
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3.4. hv-vpindex
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================
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Provides HV_X64_MSR_VP_INDEX (0x40000002) MSR to the guest which has Virtual
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processor index information. This enlightenment makes sense in conjunction with
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hv-synic, hv-stimer and other enlightenments which require the guest to know its
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Virtual Processor indices (e.g. when VP index needs to be passed in a
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hypercall).
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3.5. hv-runtime
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================
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Provides HV_X64_MSR_VP_RUNTIME (0x40000010) MSR to the guest. The MSR keeps the
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virtual processor run time in 100ns units. This gives guest operating system an
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idea of how much time was 'stolen' from it (when the virtual CPU was preempted
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to perform some other work).
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3.6. hv-crash
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==============
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Provides HV_X64_MSR_CRASH_P0..HV_X64_MSR_CRASH_P5 (0x40000100..0x40000105) and
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HV_X64_MSR_CRASH_CTL (0x40000105) MSRs to the guest. These MSRs are written to
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by the guest when it crashes, HV_X64_MSR_CRASH_P0..HV_X64_MSR_CRASH_P5 MSRs
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contain additional crash information. This information is outputted in QEMU log
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and through QAPI.
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Note: unlike under genuine Hyper-V, write to HV_X64_MSR_CRASH_CTL causes guest
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to shutdown. This effectively blocks crash dump generation by Windows.
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3.7. hv-time
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=============
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Enables two Hyper-V-specific clocksources available to the guest: MSR-based
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Hyper-V clocksource (HV_X64_MSR_TIME_REF_COUNT, 0x40000020) and Reference TSC
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page (enabled via MSR HV_X64_MSR_REFERENCE_TSC, 0x40000021). Both clocksources
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are per-guest, Reference TSC page clocksource allows for exit-less time stamp
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readings. Using this enlightenment leads to significant speedup of all timestamp
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related operations.
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3.8. hv-synic
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==============
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Enables Hyper-V Synthetic interrupt controller - an extension of a local APIC.
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When enabled, this enlightenment provides additional communication facilities
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to the guest: SynIC messages and Events. This is a pre-requisite for
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implementing VMBus devices (not yet in QEMU). Additionally, this enlightenment
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is needed to enable Hyper-V synthetic timers. SynIC is controlled through MSRs
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HV_X64_MSR_SCONTROL..HV_X64_MSR_EOM (0x40000080..0x40000084) and
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HV_X64_MSR_SINT0..HV_X64_MSR_SINT15 (0x40000090..0x4000009F)
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Requires: hv-vpindex
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3.9. hv-stimer
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===============
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Enables Hyper-V synthetic timers. There are four synthetic timers per virtual
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CPU controlled through HV_X64_MSR_STIMER0_CONFIG..HV_X64_MSR_STIMER3_COUNT
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(0x400000B0..0x400000B7) MSRs. These timers can work either in single-shot or
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periodic mode. It is known that certain Windows versions revert to using HPET
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(or even RTC when HPET is unavailable) extensively when this enlightenment is
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not provided; this can lead to significant CPU consumption, even when virtual
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CPU is idle.
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Requires: hv-vpindex, hv-synic, hv-time
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3.10. hv-tlbflush
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==================
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Enables paravirtualized TLB shoot-down mechanism. On x86 architecture, remote
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TLB flush procedure requires sending IPIs and waiting for other CPUs to perform
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local TLB flush. In virtualized environment some virtual CPUs may not even be
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scheduled at the time of the call and may not require flushing (or, flushing
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may be postponed until the virtual CPU is scheduled). hv-tlbflush enlightenment
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implements TLB shoot-down through hypervisor enabling the optimization.
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Requires: hv-vpindex
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3.11. hv-ipi
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=============
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Enables paravirtualized IPI send mechanism. HvCallSendSyntheticClusterIpi
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hypercall may target more than 64 virtual CPUs simultaneously, doing the same
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through APIC requires more than one access (and thus exit to the hypervisor).
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Requires: hv-vpindex
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3.12. hv-vendor-id=xxx
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=======================
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This changes Hyper-V identification in CPUID 0x40000000.EBX-EDX from the default
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"Microsoft Hv". The parameter should be no longer than 12 characters. According
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to the specification, guests shouldn't use this information and it is unknown
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if there is a Windows version which acts differently.
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Note: hv-vendor-id is not an enlightenment and thus doesn't enable Hyper-V
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identification when specified without some other enlightenment.
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3.13. hv-reset
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===============
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Provides HV_X64_MSR_RESET (0x40000003) MSR to the guest allowing it to reset
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itself by writing to it. Even when this MSR is enabled, it is not a recommended
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way for Windows to perform system reboot and thus it may not be used.
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3.14. hv-frequencies
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============================================
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Provides HV_X64_MSR_TSC_FREQUENCY (0x40000022) and HV_X64_MSR_APIC_FREQUENCY
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(0x40000023) allowing the guest to get its TSC/APIC frequencies without doing
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measurements.
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3.15 hv-reenlightenment
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========================
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The enlightenment is nested specific, it targets Hyper-V on KVM guests. When
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enabled, it provides HV_X64_MSR_REENLIGHTENMENT_CONTROL (0x40000106),
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HV_X64_MSR_TSC_EMULATION_CONTROL (0x40000107)and HV_X64_MSR_TSC_EMULATION_STATUS
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(0x40000108) MSRs allowing the guest to get notified when TSC frequency changes
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(only happens on migration) and keep using old frequency (through emulation in
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the hypervisor) until it is ready to switch to the new one. This, in conjunction
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with hv-frequencies, allows Hyper-V on KVM to pass stable clocksource (Reference
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TSC page) to its own guests.
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Recommended: hv-frequencies
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3.16. hv-evmcs
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===============
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The enlightenment is nested specific, it targets Hyper-V on KVM guests. When
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enabled, it provides Enlightened VMCS feature to the guest. The feature
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implements paravirtualized protocol between L0 (KVM) and L1 (Hyper-V)
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hypervisors making L2 exits to the hypervisor faster. The feature is Intel-only.
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Note: some virtualization features (e.g. Posted Interrupts) are disabled when
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hv-evmcs is enabled. It may make sense to measure your nested workload with and
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without the feature to find out if enabling it is beneficial.
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Requires: hv-vapic
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3.17. hv-stimer-direct
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=======================
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Hyper-V specification allows synthetic timer operation in two modes: "classic",
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when expiration event is delivered as SynIC message and "direct", when the event
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is delivered via normal interrupt. It is known that nested Hyper-V can only
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use synthetic timers in direct mode and thus 'hv-stimer-direct' needs to be
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enabled.
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Requires: hv-vpindex, hv-synic, hv-time, hv-stimer
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3.17. hv-no-nonarch-coresharing=on/off/auto
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===========================================
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This enlightenment tells guest OS that virtual processors will never share a
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physical core unless they are reported as sibling SMT threads. This information
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is required by Windows and Hyper-V guests to properly mitigate SMT related CPU
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vulnerabilities.
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When the option is set to 'auto' QEMU will enable the feature only when KVM
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reports that non-architectural coresharing is impossible, this means that
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hyper-threading is not supported or completely disabled on the host. This
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setting also prevents migration as SMT settings on the destination may differ.
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When the option is set to 'on' QEMU will always enable the feature, regardless
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of host setup. To keep guests secure, this can only be used in conjunction with
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exposing correct vCPU topology and vCPU pinning.
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4. Development features
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========================
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In some cases (e.g. during development) it may make sense to use QEMU in
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'pass-through' mode and give Windows guests all enlightenments currently
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supported by KVM. This pass-through mode is enabled by "hv-passthrough" CPU
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flag.
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Note: enabling this flag effectively prevents migration as supported features
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may differ between target and destination.
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4. Useful links
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================
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Hyper-V Top Level Functional specification and other information:
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https://github.com/MicrosoftDocs/Virtualization-Documentation
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