qemu-e2k/tcg/aarch64
Richard Henderson d59d83a1c3 tcg/aarch64: Reorg goto_tb implementation
The old implementation replaces two insns, swapping between

	b	<dest>
	nop
	br	x30
and
	adrp	x30, <dest>
	addi	x30, x30, lo12:<dest>
	br	x30

There is a race condition in which a thread could be stopped at
the PC of the second insn, and when restarted does not see the
complete address computation and branches to nowhere.

The new implemetation replaces only one insn, swapping between

	b	<dest>
	br	tmp
and
	ldr	tmp, <jmp_addr>
	br	tmp

Reported-by: hev <r@hev.cc>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2023-01-17 10:36:02 -10:00
..
tcg-target-con-set.h tcg/aarch64: Split out constraint sets to tcg-target-con-set.h 2021-02-02 12:12:43 -10:00
tcg-target-con-str.h tcg/aarch64: Split out target constraints to tcg-target-con-str.h 2021-02-02 12:12:31 -10:00
tcg-target.c.inc tcg/aarch64: Reorg goto_tb implementation 2023-01-17 10:36:02 -10:00
tcg-target.h tcg/aarch64: Reorg goto_tb implementation 2023-01-17 10:36:02 -10:00
tcg-target.opc.h tcg/aarch64: Implement INDEX_op_rotl{i,v}_vec 2020-06-02 08:42:37 -07:00