004c8a8bc5
There is nothing in the specs on DMA engine interrupt lines: it should have
been in the "BCM2835 ARM Peripherals" datasheet but the appropriate
"ARM peripherals interrupt table" (p.113) is nearly empty.
All Raspberry Pi models 1-3 (based on bcm2835) have
Linux device tree (arch/arm/boot/dts/bcm2835-common.dtsi +25):
/* dma channel 11-14 share one irq */
This information is repeated in the driver code
(drivers/dma/bcm2835-dma.c +1344):
/*
* in case of channel >= 11
* use the 11th interrupt and that is shared
*/
In this patch channels 0--10 and 11--14 are handled separately.
Signed-off-by: Andrey Makarov <andrey.makarov@auriga.com>
Message-id: 20220716113210.349153-1-andrey.makarov@auriga.com
[PMM: fixed checkpatch nits]
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
119 lines
3.7 KiB
C
119 lines
3.7 KiB
C
/*
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* QTest testcase for BCM283x DMA engine (on Raspberry Pi 3)
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* and its interrupts coming to Interrupt Controller.
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*
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* Copyright (c) 2022 Auriga LLC
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*
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* SPDX-License-Identifier: GPL-2.0-or-later
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*/
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#include "qemu/osdep.h"
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#include "libqtest-single.h"
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/* Offsets in raspi3b platform: */
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#define RASPI3_DMA_BASE 0x3f007000
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#define RASPI3_IC_BASE 0x3f00b200
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/* Used register/fields definitions */
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/* DMA engine registers: */
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#define BCM2708_DMA_CS 0
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#define BCM2708_DMA_ACTIVE (1 << 0)
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#define BCM2708_DMA_INT (1 << 2)
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#define BCM2708_DMA_ADDR 0x04
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#define BCM2708_DMA_INT_STATUS 0xfe0
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/* DMA Trasfer Info fields: */
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#define BCM2708_DMA_INT_EN (1 << 0)
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#define BCM2708_DMA_D_INC (1 << 4)
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#define BCM2708_DMA_S_INC (1 << 8)
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/* Interrupt controller registers: */
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#define IRQ_PENDING_BASIC 0x00
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#define IRQ_GPU_PENDING1_AGGR (1 << 8)
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#define IRQ_PENDING_1 0x04
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#define IRQ_ENABLE_1 0x10
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/* Data for the test: */
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#define SCB_ADDR 256
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#define S_ADDR 32
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#define D_ADDR 64
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#define TXFR_LEN 32
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const uint32_t check_data = 0x12345678;
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static void bcm2835_dma_test_interrupt(int dma_c, int irq_line)
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{
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uint64_t dma_base = RASPI3_DMA_BASE + dma_c * 0x100;
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int gpu_irq_line = 16 + irq_line;
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/* Check that interrupts are silent by default: */
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writel(RASPI3_IC_BASE + IRQ_ENABLE_1, 1 << gpu_irq_line);
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int isr = readl(dma_base + BCM2708_DMA_INT_STATUS);
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g_assert_cmpint(isr, ==, 0);
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uint32_t reg0 = readl(dma_base + BCM2708_DMA_CS);
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g_assert_cmpint(reg0, ==, 0);
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uint32_t ic_pending = readl(RASPI3_IC_BASE + IRQ_PENDING_BASIC);
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g_assert_cmpint(ic_pending, ==, 0);
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uint32_t gpu_pending1 = readl(RASPI3_IC_BASE + IRQ_PENDING_1);
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g_assert_cmpint(gpu_pending1, ==, 0);
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/* Prepare Control Block: */
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writel(SCB_ADDR + 0, BCM2708_DMA_S_INC | BCM2708_DMA_D_INC |
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BCM2708_DMA_INT_EN); /* transfer info */
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writel(SCB_ADDR + 4, S_ADDR); /* source address */
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writel(SCB_ADDR + 8, D_ADDR); /* destination address */
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writel(SCB_ADDR + 12, TXFR_LEN); /* transfer length */
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writel(dma_base + BCM2708_DMA_ADDR, SCB_ADDR);
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writel(S_ADDR, check_data);
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for (int word = S_ADDR + 4; word < S_ADDR + TXFR_LEN; word += 4) {
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writel(word, ~check_data);
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}
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/* Perform the transfer: */
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writel(dma_base + BCM2708_DMA_CS, BCM2708_DMA_ACTIVE);
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/* Check that destination == source: */
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uint32_t data = readl(D_ADDR);
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g_assert_cmpint(data, ==, check_data);
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for (int word = D_ADDR + 4; word < D_ADDR + TXFR_LEN; word += 4) {
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data = readl(word);
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g_assert_cmpint(data, ==, ~check_data);
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}
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/* Check that interrupt status is set both in DMA and IC controllers: */
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isr = readl(RASPI3_DMA_BASE + BCM2708_DMA_INT_STATUS);
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g_assert_cmpint(isr, ==, 1 << dma_c);
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ic_pending = readl(RASPI3_IC_BASE + IRQ_PENDING_BASIC);
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g_assert_cmpint(ic_pending, ==, IRQ_GPU_PENDING1_AGGR);
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gpu_pending1 = readl(RASPI3_IC_BASE + IRQ_PENDING_1);
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g_assert_cmpint(gpu_pending1, ==, 1 << gpu_irq_line);
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/* Clean up, clear interrupt: */
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writel(dma_base + BCM2708_DMA_CS, BCM2708_DMA_INT);
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}
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static void bcm2835_dma_test_interrupts(void)
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{
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/* DMA engines 0--10 have separate IRQ lines, 11--14 - only one: */
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bcm2835_dma_test_interrupt(0, 0);
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bcm2835_dma_test_interrupt(10, 10);
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bcm2835_dma_test_interrupt(11, 11);
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bcm2835_dma_test_interrupt(14, 11);
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}
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int main(int argc, char **argv)
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{
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int ret;
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g_test_init(&argc, &argv, NULL);
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qtest_add_func("/bcm2835/dma/test_interrupts",
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bcm2835_dma_test_interrupts);
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qtest_start("-machine raspi3b");
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ret = g_test_run();
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qtest_end();
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return ret;
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}
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