Emilio G. Cota 7f93879e44 target/openrisc: fetch code with translator_ld ...

Signed-off-by: Emilio G. Cota <cota@braap.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>

2019-10-28 15:12:38 +00:00

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alpha

target/alpha: fetch code with translator_ld

2019-10-28 15:12:38 +00:00

arm

target/arm: fetch code with translator_ld

2019-10-28 15:12:38 +00:00

cris

cputlb: ensure _cmmu helper functions follow the naming standard

2019-10-28 15:12:38 +00:00

hppa

target/hppa: fetch code with translator_ld

2019-10-28 15:12:38 +00:00

i386

target/i386: fetch code with translator_ld

2019-10-28 15:12:38 +00:00

lm32

…

m68k

target/m68k: fetch code with translator_ld

2019-10-28 15:12:38 +00:00

microblaze

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mips

target/mips: Refactor handling of vector compare 'less than' (signed) instructions

2019-10-25 18:37:01 +02:00

moxie

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nios2

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openrisc

target/openrisc: fetch code with translator_ld

2019-10-28 15:12:38 +00:00

ppc

target/ppc: fetch code with translator_ld

2019-10-28 15:12:38 +00:00

riscv

target/riscv: fetch code with translator_ld

2019-10-28 15:12:38 +00:00

s390x

s390x/kvm: Set default cpu model for all machine classes

2019-10-21 18:03:08 +02:00

sh4

target/sh4: fetch code with translator_ld

2019-10-28 15:12:38 +00:00

sparc

target/sparc: fetch code with translator_ld

2019-10-28 15:12:38 +00:00

tilegx

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tricore

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unicore32

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xtensa

target/xtensa: fetch code with translator_ld

2019-10-28 15:12:38 +00:00