qemu-e2k/target
Fabiano Rosas 7fc1dc8313 target/ppc: Fix e6500 boot
When Altivec support was added to the e6500 kernel in 2012[1], the
QEMU code was not changed, so we don't register the VPU/VPUA
exceptions for the e6500:

  qemu: fatal: Raised an exception without defined vector 73

Note that the error message says 73, instead of 32, which is the IVOR
for VPU. This is because QEMU knows only knows about the VPU interrupt
for the 7400s. In theory, we should not be raising _that_ VPU
interrupt, but instead another one specific for the e6500.

We unfortunately cannot register e6500-specific VPU/VPUA interrupts
because the SPEU/EFPDI interrupts also use IVOR32/33. These are
present only in the e500v1/2 versions. From the user manual:

e500v1, e500v2: only SPEU/EFPDI/EFPRI
e500mc, e5500:  no SPEU/EFPDI/EFPRI/VPU/VPUA
e6500:          only VPU/VPUA

So I'm leaving IVOR32/33 as SPEU/EFPDI, but altering the dispatch code
to convert the VPU #73 to a #32 when we're in the e6500. Since the
handling for SPEU and VPU is the same this is the only change that's
needed. The EFPDI is not implemented and will cause an abort. I don't
think it worth it changing the error message to take VPUA into
consideration, so I'm not changing anything there.

This bug was discussed in the thread:
https://lists.gnu.org/archive/html/qemu-ppc/2021-06/msg00222.html

1- https://git.kernel.org/torvalds/c/cd66cc2ee52

Reported-by: <mario@locati.it>
Signed-off-by: Fabiano Rosas <farosas@linux.ibm.com>
Reviewed-by: Cédric Le Goater <clg@kaod.org>
Message-Id: <20211213133542.2608540-1-farosas@linux.ibm.com>
Signed-off-by: Cédric Le Goater <clg@kaod.org>
2021-12-17 17:57:18 +01:00
..
alpha target/alpha: Implement alpha_cpu_record_sigbus 2021-11-02 07:00:52 -04:00
arm Revert "arm: tcg: Adhere to SMCCC 1.3 section 5.2" 2021-11-22 13:41:48 +00:00
avr target/avr: Drop checks for singlestep_enabled 2021-10-15 16:39:14 -07:00
cris target/cris: Make cris_cpu_tlb_fill sysemu only 2021-11-02 07:00:52 -04:00
hexagon This series adds support for the Hexagon Vector eXtensions (HVX) 2021-11-04 06:34:36 -04:00
hppa target/hppa: Make hppa_cpu_tlb_fill sysemu only 2021-11-02 07:00:52 -04:00
i386 Bugfixes for 6.2. 2021-11-19 17:16:57 +01:00
m68k target/m68k: Make m68k_cpu_tlb_fill sysemu only 2021-11-02 07:00:52 -04:00
microblaze target/microblaze: Do not set MO_ALIGN for user-only 2021-11-02 07:00:52 -04:00
mips MIPS patches queue 2021-11-02 15:12:11 -04:00
nios2 target/nios2: Implement nios2_cpu_record_sigsegv 2021-11-02 07:00:52 -04:00
openrisc target/openrisc: Make openrisc_cpu_tlb_fill sysemu only 2021-11-02 07:00:52 -04:00
ppc target/ppc: Fix e6500 boot 2021-12-17 17:57:18 +01:00
riscv target/riscv: machine: Sort the .subsections 2021-11-17 19:18:22 +10:00
rx target/rx: Drop checks for singlestep_enabled 2021-10-15 16:39:14 -07:00
s390x target/s390x/cpu.h: Remove unused SIGP_MODE defines 2021-11-17 10:17:28 +01:00
sh4 target/sh4: Set fault address in superh_cpu_do_unaligned_access 2021-11-02 07:00:52 -04:00
sparc target/sparc: Set fault address in sparc_cpu_do_unaligned_access 2021-11-02 07:00:52 -04:00
tricore target/tricore: Drop check for singlestep_enabled 2021-10-15 16:39:14 -07:00
xtensa Trivial patches branch pull request 20211101 v2 2021-11-03 11:24:09 -04:00
Kconfig meson: Introduce target-specific Kconfig 2021-07-09 18:21:34 +02:00
meson.build