qemu-e2k/include/hw/sd/cadence_sdhci.h
Bin Meng c696e1f2b3 hw/sd: Add Cadence SDHCI emulation
Cadence SD/SDIO/eMMC Host Controller (SD4HC) is an SDHCI compatible
controller. The SDHCI compatible registers start from offset 0x200,
which are called Slot Register Set (SRS) in its datasheet.

This creates a Cadence SDHCI model built on top of the existing
generic SDHCI model. Cadence specific Host Register Set (HRS) is
implemented to make guest software happy.

Signed-off-by: Bin Meng <bin.meng@windriver.com>
Acked-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Acked-by: Alistair Francis <alistair.francis@wdc.com>
Message-Id: <1598924352-89526-8-git-send-email-bmeng.cn@gmail.com>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
2020-09-09 15:54:18 -07:00

48 lines
1.4 KiB
C

/*
* Cadence SDHCI emulation
*
* Copyright (c) 2020 Wind River Systems, Inc.
*
* Author:
* Bin Meng <bin.meng@windriver.com>
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 or
* (at your option) version 3 of the License.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License along
* with this program; if not, see <http://www.gnu.org/licenses/>.
*/
#ifndef CADENCE_SDHCI_H
#define CADENCE_SDHCI_H
#include "hw/sd/sdhci.h"
#define CADENCE_SDHCI_REG_SIZE 0x100
#define CADENCE_SDHCI_NUM_REGS (CADENCE_SDHCI_REG_SIZE / sizeof(uint32_t))
typedef struct CadenceSDHCIState {
SysBusDevice parent;
MemoryRegion container;
MemoryRegion iomem;
BusState *bus;
uint32_t regs[CADENCE_SDHCI_NUM_REGS];
SDHCIState sdhci;
} CadenceSDHCIState;
#define TYPE_CADENCE_SDHCI "cadence.sdhci"
#define CADENCE_SDHCI(obj) OBJECT_CHECK(CadenceSDHCIState, (obj), \
TYPE_CADENCE_SDHCI)
#endif /* CADENCE_SDHCI_H */