qemu-e2k/target-arm
Peter Maydell 9b6a3ea7a6 target-arm: Correctly handle 'sub pc, pc, 1' for ARMv6
In the ARM v6 architecture, 'sub pc, pc, 1' is not an interworking
branch, so the computed new value is written to r15 as a normal
value. The architecture says that in this case, bits [1:0] of
the value written must be ignored if we are in ARM mode (or
bit [0] ignored if in Thumb mode); this is a change from the
ARMv4/v5 specification that behaviour is UNPREDICTABLE.
Use the correct mask on the PC value when doing a non-interworking
store to PC.

A popular library used on RaspberryPi uses this instruction
as part of a trick to determine whether it is running on
ARMv6 or ARMv7, and we were mishandling the sequence.

Fixes bug: https://bugs.launchpad.net/bugs/1625295

Reported-by: <stu.axon@gmail.com>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 1474380941-4730-1-git-send-email-peter.maydell@linaro.org
2016-10-04 13:28:10 +01:00
..
arch_dump.c
arm_ldst.h
arm-powerctl.c
arm-powerctl.h
arm-semi.c
cpu64.c
cpu-qom.h
cpu.c arm: add Cortex A7 CPU parameters 2016-09-22 18:13:05 +01:00
cpu.h
crypto_helper.c
gdbstub64.c
gdbstub.c
helper-a64.c
helper-a64.h
helper.c tcg: Merge GETPC and GETRA 2016-09-16 08:12:11 -07:00
helper.h
internals.h
iwmmxt_helper.c
kvm32.c
kvm64.c
kvm_arm.h target-arm: move gicv3_class_name from machine to kvm_arm.h 2016-10-04 13:28:08 +01:00
kvm-consts.h
kvm-stub.c
kvm.c
machine.c target-arm: move gicv3_class_name from machine to kvm_arm.h 2016-10-04 13:28:08 +01:00
Makefile.objs
monitor.c
neon_helper.c target-arm: Fix warn about implicit conversion 2016-08-12 11:12:24 +01:00
op_addsub.h
op_helper.c target-arm: Fix lpae bit in FSR on an alignment fault 2016-09-06 19:52:17 +01:00
psci.c
translate-a64.c target-arm: A64: Fix decoding of iss_sf in disas_ld_lit 2016-10-04 13:28:10 +01:00
translate.c target-arm: Correctly handle 'sub pc, pc, 1' for ARMv6 2016-10-04 13:28:10 +01:00
translate.h