qemu-e2k/target/arm
Michael Davidsaver 81dd9648c6 armv7m: set CFSR.UNDEFINSTR on undefined instructions
When we take an exception for an undefined instruction, set the
appropriate CFSR bit.

Signed-off-by: Michael Davidsaver <mdavidsaver@gmail.com>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Message-id: 1485285380-10565-7-git-send-email-peter.maydell@linaro.org
[PMM: tweaked commit message, comment]
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2017-01-27 15:29:08 +00:00
..
Makefile.objs
arch_dump.c
arm-powerctl.c
arm-powerctl.h
arm-semi.c
arm_ldst.h
cpu-qom.h
cpu.c armv7m: add state for v7M CCR, CFSR, HFSR, DFSR, MMFAR, BFAR 2017-01-27 15:29:08 +00:00
cpu.h armv7m: add state for v7M CCR, CFSR, HFSR, DFSR, MMFAR, BFAR 2017-01-27 15:29:08 +00:00
cpu64.c target-arm: Enable EL2 feature bit on A53 and A57 2017-01-20 11:15:10 +00:00
crypto_helper.c
gdbstub.c
gdbstub64.c
helper-a64.c target-arm: Use clrsb helper 2017-01-10 08:47:48 -08:00
helper-a64.h target-arm: Use clrsb helper 2017-01-10 08:47:48 -08:00
helper.c armv7m: set CFSR.UNDEFINSTR on undefined instructions 2017-01-27 15:29:08 +00:00
helper.h target-arm: Use clz opcode 2017-01-10 08:06:11 -08:00
internals.h armv7m: Fix reads of CONTROL register bit 1 2017-01-27 15:20:21 +00:00
iwmmxt_helper.c
kvm-consts.h
kvm-stub.c
kvm.c
kvm32.c
kvm64.c
kvm_arm.h
machine.c armv7m: add state for v7M CCR, CFSR, HFSR, DFSR, MMFAR, BFAR 2017-01-27 15:29:08 +00:00
monitor.c
neon_helper.c
op_addsub.h
op_helper.c target-arm: Log AArch64 exception returns 2016-12-27 14:59:25 +00:00
psci.c target/arm/psci.c: If EL2 implemented, start CPUs in EL2 2017-01-20 11:15:10 +00:00
trace-events
translate-a64.c target/arm: Fix ubfx et al for aarch64 2017-01-13 09:48:20 -08:00
translate.c armv7m: Replace armv7m.hack with unassigned_access handler 2017-01-27 15:20:21 +00:00
translate.h