563e3c6e6e
The direction bit in the control register should not be directly
set using PPWCONTROL. The kernel gives the following debug message.
parport0 (ppdev0): use data_reverse for this!
More over setting the data pins to forward mode does not work,
perhaps a bug in the Linux PP driver. The right way to do this is
to use PPDATADIR to set the direction. The patch checks if the
user is toggling the direction bit, and invokes PPDATADIR to
do the job.
Signed-off-by: Vijay Kumar B <vijaykumar@bravegnu.org>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5063 c046a42c-6fe2-441c-8c8c-71466251a162
89 lines
2.9 KiB
C
89 lines
2.9 KiB
C
#ifndef QEMU_CHAR_H
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#define QEMU_CHAR_H
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/* character device */
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#define CHR_EVENT_BREAK 0 /* serial break char */
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#define CHR_EVENT_FOCUS 1 /* focus to this terminal (modal input needed) */
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#define CHR_EVENT_RESET 2 /* new connection established */
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#define CHR_IOCTL_SERIAL_SET_PARAMS 1
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typedef struct {
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int speed;
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int parity;
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int data_bits;
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int stop_bits;
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} QEMUSerialSetParams;
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#define CHR_IOCTL_SERIAL_SET_BREAK 2
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#define CHR_IOCTL_PP_READ_DATA 3
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#define CHR_IOCTL_PP_WRITE_DATA 4
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#define CHR_IOCTL_PP_READ_CONTROL 5
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#define CHR_IOCTL_PP_WRITE_CONTROL 6
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#define CHR_IOCTL_PP_READ_STATUS 7
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#define CHR_IOCTL_PP_EPP_READ_ADDR 8
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#define CHR_IOCTL_PP_EPP_READ 9
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#define CHR_IOCTL_PP_EPP_WRITE_ADDR 10
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#define CHR_IOCTL_PP_EPP_WRITE 11
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#define CHR_IOCTL_PP_DATA_DIR 12
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#define CHR_IOCTL_SERIAL_SET_TIOCM 12
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#define CHR_IOCTL_SERIAL_GET_TIOCM 13
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#define CHR_TIOCM_CTS 0x020
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#define CHR_TIOCM_CAR 0x040
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#define CHR_TIOCM_DSR 0x100
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#define CHR_TIOCM_RI 0x080
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#define CHR_TIOCM_DTR 0x002
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#define CHR_TIOCM_RTS 0x004
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typedef void IOEventHandler(void *opaque, int event);
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struct CharDriverState {
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int (*chr_write)(struct CharDriverState *s, const uint8_t *buf, int len);
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void (*chr_update_read_handler)(struct CharDriverState *s);
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int (*chr_ioctl)(struct CharDriverState *s, int cmd, void *arg);
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IOEventHandler *chr_event;
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IOCanRWHandler *chr_can_read;
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IOReadHandler *chr_read;
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void *handler_opaque;
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void (*chr_send_event)(struct CharDriverState *chr, int event);
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void (*chr_close)(struct CharDriverState *chr);
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void (*chr_accept_input)(struct CharDriverState *chr);
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void *opaque;
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int focus;
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QEMUBH *bh;
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};
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CharDriverState *qemu_chr_open(const char *filename);
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void qemu_chr_close(CharDriverState *chr);
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void qemu_chr_printf(CharDriverState *s, const char *fmt, ...);
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int qemu_chr_write(CharDriverState *s, const uint8_t *buf, int len);
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void qemu_chr_send_event(CharDriverState *s, int event);
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void qemu_chr_add_handlers(CharDriverState *s,
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IOCanRWHandler *fd_can_read,
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IOReadHandler *fd_read,
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IOEventHandler *fd_event,
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void *opaque);
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int qemu_chr_ioctl(CharDriverState *s, int cmd, void *arg);
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void qemu_chr_reset(CharDriverState *s);
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int qemu_chr_can_read(CharDriverState *s);
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void qemu_chr_read(CharDriverState *s, uint8_t *buf, int len);
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void qemu_chr_accept_input(CharDriverState *s);
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/* async I/O support */
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int qemu_set_fd_handler2(int fd,
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IOCanRWHandler *fd_read_poll,
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IOHandler *fd_read,
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IOHandler *fd_write,
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void *opaque);
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int qemu_set_fd_handler(int fd,
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IOHandler *fd_read,
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IOHandler *fd_write,
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void *opaque);
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#endif
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