OpenE2K/qemu-e2k
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qemu-e2k/hw/riscv
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Markus Armbruster 0b8fa32f55 Include qemu/module.h where needed, drop it from qemu-common.h 
Signed-off-by: Markus Armbruster <armbru@redhat.com>
Message-Id: <20190523143508.25387-4-armbru@redhat.com>
[Rebased with conflicts resolved automatically, except for
hw/usb/dev-hub.c hw/misc/exynos4210_rng.c hw/misc/bcm2835_rng.c
hw/misc/aspeed_scu.c hw/display/virtio-vga.c hw/arm/stm32f205_soc.c;
ui/cocoa.m fixed up]
2019-06-12 13:18:33 +02:00
..
Kconfig kconfig: add CONFIG_MSI_NONBROKEN 2019-03-18 09:39:57 +01:00
Makefile.objs SiFive RISC-V GPIO Device 2019-05-24 11:58:30 -07:00
riscv_hart.c Include qemu/module.h where needed, drop it from qemu-common.h 2019-06-12 13:18:33 +02:00
riscv_htif.c
sifive_clint.c Include qemu/module.h where needed, drop it from qemu-common.h 2019-06-12 13:18:33 +02:00
sifive_e.c SiFive RISC-V GPIO Device 2019-05-24 11:58:30 -07:00
sifive_gpio.c SiFive RISC-V GPIO Device 2019-05-24 11:58:30 -07:00
sifive_plic.c Include qemu/module.h where needed, drop it from qemu-common.h 2019-06-12 13:18:33 +02:00
sifive_prci.c Include qemu/module.h where needed, drop it from qemu-common.h 2019-06-12 13:18:33 +02:00
sifive_test.c Include qemu/module.h where needed, drop it from qemu-common.h 2019-06-12 13:18:33 +02:00
sifive_u.c riscv: sifive_u: Correct UART0's IRQ in the device tree 2019-03-19 05:18:42 -07:00
sifive_uart.c riscv: sifive_uart: Generate TX interrupt 2019-03-19 05:18:28 -07:00
spike.c riscv: spike: Add a generic spike machine 2019-05-24 12:09:24 -07:00
trace-events SiFive RISC-V GPIO Device 2019-05-24 11:58:30 -07:00
virt.c riscv: virt: Allow specifying a CPU via commandline 2019-05-24 12:09:23 -07:00