Ziqiao Kong 84abdd7d27 target/i386: Correct implementation for FCS, FIP, FDS and FDP ... Update FCS:FIP and FDS:FDP according to the Intel Manual Vol.1 8.1.8. Note that CPUID.(EAX=07H,ECX=0H):EBX[bit 13] is not implemented by design in this patch and will be added along with TCG features flag in a separate patch later. Signed-off-by: Ziqiao Kong <ziqiaokong@gmail.com> Message-Id: <20210530150112.74411-2-ziqiaokong@gmail.com> [rth: Push FDS/FDP handling down into mod != 3 case; free last_addr.] Signed-off-by: Richard Henderson <richard.henderson@linaro.org>		2021-07-13 08:13:19 -07:00
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hax
hvf	target/i386: Populate x86_ext_save_areas offsets using cpuid where possible	2021-07-06 08:33:48 +02:00
kvm	target/i386: Populate x86_ext_save_areas offsets using cpuid where possible	2021-07-06 08:33:48 +02:00
nvmm
tcg	target/i386: Correct implementation for FCS, FIP, FDS and FDP	2021-07-13 08:13:19 -07:00
whpx
arch_dump.c
arch_memory_mapping.c
cpu-dump.c
cpu-internal.h
cpu-param.h
cpu-qom.h
cpu-sysemu.c
cpu.c	target/i386: Populate x86_ext_save_areas offsets using cpuid where possible	2021-07-06 08:33:48 +02:00
cpu.h	target/i386: Correct implementation for FCS, FIP, FDS and FDP	2021-07-13 08:13:19 -07:00
gdbstub.c
helper.c
helper.h	target/i386: fix exceptions for MOV to DR	2021-07-09 18:21:34 +02:00
host-cpu.c
host-cpu.h
Kconfig	meson: Introduce target-specific Kconfig	2021-07-09 18:21:34 +02:00
machine.c
meson.build
monitor.c
ops_sse_header.h	tcg: Combine dh_is_64bit and dh_is_signed to dh_typecode	2021-06-19 08:51:11 -07:00
ops_sse.h
sev_i386.h
sev-stub.c
sev.c
shift_helper_template.h
svm.h	target/i386: fix exceptions for MOV to DR	2021-07-09 18:21:34 +02:00
trace-events
trace.h
xsave_helper.c	target/i386: Observe XSAVE state area offsets	2021-07-06 07:54:53 +02:00