c363a37a45
Commit d5fc133eed ("ppc: Rework CPU compatibility testing
across migration") changed the way cpu_post_load behaves with
the PVR setting, causing an unexpected bug in KVM-HV migrations
between hosts that are compatible (POWER8 and POWER8E, for example).
Even with pvr_match() returning true, the guest freezes right after
cpu_post_load. The reason is that the guest kernel can't handle a
different PVR value other that the running host in KVM_SET_SREGS.
In [1] it was discussed the possibility of a new KVM capability
that would indicate that the guest kernel can handle a different
PVR in KVM_SET_SREGS. Even if such feature is implemented, there is
still the problem with older kernels that will not have this capability
and will fail to migrate.
This patch implements a workaround for that scenario. If running
with KVM, check if the guest kernel does not have the capability
(named here as 'cap_ppc_pvr_compat'). If it doesn't, calls
kvmppc_is_pr() to see if the guest is running in KVM-HV. If all this
happens, set env->spr[SPR_PVR] to the same value as the current
host PVR. This ensures that we allow migrations with 'close enough'
PVRs to still work in KVM-HV but also makes the code ready for
this new KVM capability when it is done.
A new function called 'kvmppc_pvr_workaround_required' was created
to encapsulate the conditions said above and to avoid calling too
many kvm.c internals inside cpu_post_load.
[1] https://lists.gnu.org/archive/html/qemu-ppc/2017-06/msg00503.html
Signed-off-by: Daniel Henrique Barboza <danielhb@linux.vnet.ibm.com>
[dwg: Fix for the case of using TCG on a PPC host]
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
373 lines
8.6 KiB
C
373 lines
8.6 KiB
C
/*
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* Copyright 2008 IBM Corporation.
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* Authors: Hollis Blanchard <hollisb@us.ibm.com>
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*
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* This work is licensed under the GNU GPL license version 2 or later.
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*
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*/
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#ifndef KVM_PPC_H
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#define KVM_PPC_H
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#define TYPE_HOST_POWERPC_CPU "host-" TYPE_POWERPC_CPU
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#ifdef CONFIG_KVM
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uint32_t kvmppc_get_tbfreq(void);
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uint64_t kvmppc_get_clockfreq(void);
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uint32_t kvmppc_get_vmx(void);
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uint32_t kvmppc_get_dfp(void);
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bool kvmppc_get_host_model(char **buf);
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bool kvmppc_get_host_serial(char **buf);
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int kvmppc_get_hasidle(CPUPPCState *env);
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int kvmppc_get_hypercall(CPUPPCState *env, uint8_t *buf, int buf_len);
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int kvmppc_set_interrupt(PowerPCCPU *cpu, int irq, int level);
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void kvmppc_enable_logical_ci_hcalls(void);
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void kvmppc_enable_set_mode_hcall(void);
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void kvmppc_enable_clear_ref_mod_hcalls(void);
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void kvmppc_set_papr(PowerPCCPU *cpu);
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int kvmppc_set_compat(PowerPCCPU *cpu, uint32_t compat_pvr);
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void kvmppc_set_mpic_proxy(PowerPCCPU *cpu, int mpic_proxy);
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int kvmppc_smt_threads(void);
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int kvmppc_clear_tsr_bits(PowerPCCPU *cpu, uint32_t tsr_bits);
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int kvmppc_or_tsr_bits(PowerPCCPU *cpu, uint32_t tsr_bits);
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int kvmppc_set_tcr(PowerPCCPU *cpu);
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int kvmppc_booke_watchdog_enable(PowerPCCPU *cpu);
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target_ulong kvmppc_configure_v3_mmu(PowerPCCPU *cpu,
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bool radix, bool gtse,
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uint64_t proc_tbl);
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#ifndef CONFIG_USER_ONLY
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off_t kvmppc_alloc_rma(void **rma);
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bool kvmppc_spapr_use_multitce(void);
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int kvmppc_spapr_enable_inkernel_multitce(void);
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void *kvmppc_create_spapr_tce(uint32_t liobn, uint32_t page_shift,
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uint64_t bus_offset, uint32_t nb_table,
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int *pfd, bool need_vfio);
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int kvmppc_remove_spapr_tce(void *table, int pfd, uint32_t window_size);
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int kvmppc_reset_htab(int shift_hint);
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uint64_t kvmppc_rma_size(uint64_t current_size, unsigned int hash_shift);
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#endif /* !CONFIG_USER_ONLY */
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bool kvmppc_has_cap_epr(void);
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int kvmppc_define_rtas_kernel_token(uint32_t token, const char *function);
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bool kvmppc_has_cap_htab_fd(void);
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int kvmppc_get_htab_fd(bool write);
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int kvmppc_save_htab(QEMUFile *f, int fd, size_t bufsize, int64_t max_ns);
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int kvmppc_load_htab_chunk(QEMUFile *f, int fd, uint32_t index,
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uint16_t n_valid, uint16_t n_invalid);
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void kvmppc_read_hptes(ppc_hash_pte64_t *hptes, hwaddr ptex, int n);
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void kvmppc_write_hpte(hwaddr ptex, uint64_t pte0, uint64_t pte1);
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bool kvmppc_has_cap_fixup_hcalls(void);
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bool kvmppc_has_cap_htm(void);
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bool kvmppc_has_cap_mmu_radix(void);
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bool kvmppc_has_cap_mmu_hash_v3(void);
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int kvmppc_enable_hwrng(void);
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int kvmppc_put_books_sregs(PowerPCCPU *cpu);
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PowerPCCPUClass *kvm_ppc_get_host_cpu_class(void);
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void kvmppc_check_papr_resize_hpt(Error **errp);
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int kvmppc_resize_hpt_prepare(PowerPCCPU *cpu, target_ulong flags, int shift);
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int kvmppc_resize_hpt_commit(PowerPCCPU *cpu, target_ulong flags, int shift);
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void kvmppc_update_sdr1(target_ulong sdr1);
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bool kvmppc_pvr_workaround_required(PowerPCCPU *cpu);
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bool kvmppc_is_mem_backend_page_size_ok(const char *obj_path);
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#else
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static inline uint32_t kvmppc_get_tbfreq(void)
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{
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return 0;
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}
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static inline bool kvmppc_get_host_model(char **buf)
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{
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return false;
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}
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static inline bool kvmppc_get_host_serial(char **buf)
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{
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return false;
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}
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static inline uint64_t kvmppc_get_clockfreq(void)
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{
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return 0;
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}
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static inline uint32_t kvmppc_get_vmx(void)
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{
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return 0;
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}
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static inline uint32_t kvmppc_get_dfp(void)
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{
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return 0;
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}
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static inline int kvmppc_get_hasidle(CPUPPCState *env)
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{
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return 0;
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}
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static inline int kvmppc_get_hypercall(CPUPPCState *env, uint8_t *buf, int buf_len)
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{
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return -1;
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}
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static inline int kvmppc_set_interrupt(PowerPCCPU *cpu, int irq, int level)
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{
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return -1;
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}
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static inline void kvmppc_enable_logical_ci_hcalls(void)
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{
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}
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static inline void kvmppc_enable_set_mode_hcall(void)
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{
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}
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static inline void kvmppc_enable_clear_ref_mod_hcalls(void)
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{
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}
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static inline void kvmppc_set_papr(PowerPCCPU *cpu)
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{
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}
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static inline int kvmppc_set_compat(PowerPCCPU *cpu, uint32_t compat_pvr)
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{
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return 0;
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}
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static inline void kvmppc_set_mpic_proxy(PowerPCCPU *cpu, int mpic_proxy)
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{
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}
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static inline int kvmppc_smt_threads(void)
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{
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return 1;
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}
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static inline int kvmppc_or_tsr_bits(PowerPCCPU *cpu, uint32_t tsr_bits)
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{
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return 0;
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}
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static inline int kvmppc_clear_tsr_bits(PowerPCCPU *cpu, uint32_t tsr_bits)
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{
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return 0;
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}
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static inline int kvmppc_set_tcr(PowerPCCPU *cpu)
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{
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return 0;
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}
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static inline int kvmppc_booke_watchdog_enable(PowerPCCPU *cpu)
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{
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return -1;
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}
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static inline target_ulong kvmppc_configure_v3_mmu(PowerPCCPU *cpu,
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bool radix, bool gtse,
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uint64_t proc_tbl)
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{
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return 0;
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}
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#ifndef CONFIG_USER_ONLY
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static inline off_t kvmppc_alloc_rma(void **rma)
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{
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return 0;
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}
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static inline bool kvmppc_spapr_use_multitce(void)
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{
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return false;
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}
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static inline int kvmppc_spapr_enable_inkernel_multitce(void)
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{
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return -1;
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}
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static inline void *kvmppc_create_spapr_tce(uint32_t liobn, uint32_t page_shift,
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uint64_t bus_offset,
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uint32_t nb_table,
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int *pfd, bool need_vfio)
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{
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return NULL;
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}
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static inline int kvmppc_remove_spapr_tce(void *table, int pfd,
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uint32_t nb_table)
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{
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return -1;
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}
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static inline int kvmppc_reset_htab(int shift_hint)
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{
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return 0;
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}
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static inline uint64_t kvmppc_rma_size(uint64_t current_size,
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unsigned int hash_shift)
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{
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return ram_size;
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}
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static inline bool kvmppc_is_mem_backend_page_size_ok(const char *obj_path)
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{
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return true;
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}
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#endif /* !CONFIG_USER_ONLY */
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static inline bool kvmppc_has_cap_epr(void)
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{
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return false;
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}
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static inline int kvmppc_define_rtas_kernel_token(uint32_t token,
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const char *function)
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{
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return -1;
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}
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static inline bool kvmppc_has_cap_htab_fd(void)
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{
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return false;
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}
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static inline int kvmppc_get_htab_fd(bool write)
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{
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return -1;
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}
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static inline int kvmppc_save_htab(QEMUFile *f, int fd, size_t bufsize,
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int64_t max_ns)
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{
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abort();
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}
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static inline int kvmppc_load_htab_chunk(QEMUFile *f, int fd, uint32_t index,
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uint16_t n_valid, uint16_t n_invalid)
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{
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abort();
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}
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static inline void kvmppc_read_hptes(ppc_hash_pte64_t *hptes,
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hwaddr ptex, int n)
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{
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abort();
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}
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static inline void kvmppc_write_hpte(hwaddr ptex, uint64_t pte0, uint64_t pte1)
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{
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abort();
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}
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static inline bool kvmppc_has_cap_fixup_hcalls(void)
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{
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abort();
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}
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static inline bool kvmppc_has_cap_htm(void)
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{
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return false;
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}
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static inline bool kvmppc_has_cap_mmu_radix(void)
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{
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return false;
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}
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static inline bool kvmppc_has_cap_mmu_hash_v3(void)
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{
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return false;
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}
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static inline int kvmppc_enable_hwrng(void)
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{
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return -1;
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}
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static inline int kvmppc_put_books_sregs(PowerPCCPU *cpu)
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{
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abort();
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}
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static inline PowerPCCPUClass *kvm_ppc_get_host_cpu_class(void)
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{
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return NULL;
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}
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static inline void kvmppc_check_papr_resize_hpt(Error **errp)
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{
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return;
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}
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static inline int kvmppc_resize_hpt_prepare(PowerPCCPU *cpu,
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target_ulong flags, int shift)
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{
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return -ENOSYS;
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}
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static inline int kvmppc_resize_hpt_commit(PowerPCCPU *cpu,
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target_ulong flags, int shift)
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{
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return -ENOSYS;
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}
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static inline void kvmppc_update_sdr1(target_ulong sdr1)
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{
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abort();
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}
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#endif
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#ifndef CONFIG_KVM
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#define kvmppc_eieio() do { } while (0)
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static inline void kvmppc_dcbst_range(PowerPCCPU *cpu, uint8_t *addr, int len)
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{
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}
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static inline void kvmppc_icbi_range(PowerPCCPU *cpu, uint8_t *addr, int len)
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{
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}
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#else /* CONFIG_KVM */
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#define kvmppc_eieio() \
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do { \
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if (kvm_enabled()) { \
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asm volatile("eieio" : : : "memory"); \
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} \
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} while (0)
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/* Store data cache blocks back to memory */
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static inline void kvmppc_dcbst_range(PowerPCCPU *cpu, uint8_t *addr, int len)
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{
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uint8_t *p;
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for (p = addr; p < addr + len; p += cpu->env.dcache_line_size) {
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asm volatile("dcbst 0,%0" : : "r"(p) : "memory");
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}
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}
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/* Invalidate instruction cache blocks */
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static inline void kvmppc_icbi_range(PowerPCCPU *cpu, uint8_t *addr, int len)
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{
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uint8_t *p;
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for (p = addr; p < addr + len; p += cpu->env.icache_line_size) {
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asm volatile("icbi 0,%0" : : "r"(p));
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}
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}
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#endif /* CONFIG_KVM */
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#endif /* KVM_PPC_H */
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