Bin Meng 406fafd5d0 hw/riscv: Move sifive_clint model to hw/intc ... This is an effort to clean up the hw/riscv directory. Ideally it should only contain the RISC-V SoC / machine codes plus generic codes. Let's move sifive_clint model to hw/intc directory. Signed-off-by: Bin Meng <bin.meng@windriver.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-Id: <1599129623-68957-6-git-send-email-bmeng.cn@gmail.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>		2020-09-09 15:54:19 -07:00
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allwinner-a10-pic.h	include: Make headers more self-contained	2019-08-16 13:31:51 +02:00
arm_gic_common.h	arm_gic: Mask the un-supported priority bits	2020-02-28 16:14:57 +00:00
arm_gic.h	arm_gic: Mask the un-supported priority bits	2020-02-28 16:14:57 +00:00
arm_gicv3_common.h
arm_gicv3_its_common.h
arm_gicv3.h
armv7m_nvic.h
aspeed_vic.h
bcm2835_ic.h	hw/arm/bcm283x: Correct the license text	2020-03-23 17:22:30 +00:00
bcm2836_control.h	hw/arm/bcm283x: Correct the license text	2020-03-23 17:22:30 +00:00
heathrow_pic.h	include: Make headers more self-contained	2019-08-16 13:31:51 +02:00
i8259.h	hw: replace hw/i386/pc.h with a header just for the i8259	2019-12-17 19:33:49 +01:00
ibex_plic.h	hw/intc: ibex_plic: Don't allow repeat interrupts on claimed lines	2020-08-21 22:37:55 -07:00
imx_avic.h
imx_gpcv2.h
intc.h
mips_gic.h	include: Make headers more self-contained	2019-08-16 13:31:51 +02:00
realview_gic.h
rx_icu.h	hw/intc: RX62N interrupt controller (ICUa)	2020-06-22 18:37:12 +02:00
sifive_clint.h	hw/riscv: Move sifive_clint model to hw/intc	2020-09-09 15:54:19 -07:00
xlnx-pmu-iomod-intc.h
xlnx-zynqmp-ipi.h