qemu-e2k/target
Richard Henderson 855f94eca8 target/arm: Fix SVE/SME gross MTE suppression checks
The TBI and TCMA bits are located within mtedesc, not desc.

Cc: qemu-stable@nongnu.org
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Tested-by: Gustavo Romero <gustavo.romero@linaro.org>
Message-id: 20240207025210.8837-7-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2024-02-15 11:30:45 +00:00
..
alpha
arm target/arm: Fix SVE/SME gross MTE suppression checks 2024-02-15 11:30:45 +00:00
avr
cris
hexagon
hppa target/hppa: PDC_BTLB_INFO uses 32-bit ints 2024-02-11 13:20:23 +01:00
i386 target/i386/cpu: Fix typo in comment 2024-02-14 06:09:32 -05:00
loongarch
m68k kconfig: use "select" to enable semihosting 2024-02-09 17:52:30 +00:00
microblaze
mips kconfig: use "select" to enable semihosting 2024-02-09 17:52:30 +00:00
nios2 kconfig: use "select" to enable semihosting 2024-02-09 17:52:30 +00:00
openrisc
ppc
riscv testing, doc and gdbstub updates: 2024-02-12 14:14:10 +00:00
rx
s390x
sh4
sparc
tricore
xtensa kconfig: use "select" to enable semihosting 2024-02-09 17:52:30 +00:00
Kconfig
meson.build
target-common.c