f0984d4040
Introduce the target/arm/tcg directory. Its purpose is to hold the TCG code that is selected by CONFIG_TCG. Signed-off-by: Claudio Fontana <cfontana@suse.de> Signed-off-by: Fabiano Rosas <farosas@suse.de> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Tested-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
73 lines
3.2 KiB
Plaintext
73 lines
3.2 KiB
Plaintext
# M-profile UserFault.NOCP exception handling
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#
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# Copyright (c) 2020 Linaro, Ltd
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#
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# This library is free software; you can redistribute it and/or
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# modify it under the terms of the GNU Lesser General Public
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# License as published by the Free Software Foundation; either
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# version 2.1 of the License, or (at your option) any later version.
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#
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# This library is distributed in the hope that it will be useful,
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# but WITHOUT ANY WARRANTY; without even the implied warranty of
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# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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# Lesser General Public License for more details.
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#
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# You should have received a copy of the GNU Lesser General Public
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# License along with this library; if not, see <http://www.gnu.org/licenses/>.
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#
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# This file is processed by scripts/decodetree.py
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#
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# For M-profile, the architecture specifies that NOCP UsageFaults
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# should take precedence over UNDEF faults over the whole wide
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# range of coprocessor-space encodings, with the exception of
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# VLLDM and VLSTM. (Compare v8.1M IsCPInstruction() pseudocode and
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# v8M Arm ARM rule R_QLGM.) This isn't mandatory for v8.0M but we choose
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# to behave the same as v8.1M.
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# This decode is handled before any others (and in particular before
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# decoding FP instructions which are in the coprocessor space).
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# If the coprocessor is not present or disabled then we will generate
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# the NOCP exception; otherwise we let the insn through to the main decode.
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%vd_dp 22:1 12:4
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%vd_sp 12:4 22:1
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&nocp cp
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# M-profile VLDR/VSTR to sysreg
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%vldr_sysreg 22:1 13:3
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%imm7_0x4 0:7 !function=times_4
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&vldr_sysreg rn reg imm a w p
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@vldr_sysreg .... ... . a:1 . . . rn:4 ... . ... .. ....... \
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reg=%vldr_sysreg imm=%imm7_0x4 &vldr_sysreg
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{
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# Special cases which do not take an early NOCP: VLLDM and VLSTM
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VLLDM_VLSTM 1110 1100 001 l:1 rn:4 0000 1010 op:1 000 0000
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# VSCCLRM (new in v8.1M) is similar:
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VSCCLRM 1110 1100 1.01 1111 .... 1011 imm:7 0 vd=%vd_dp size=3
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VSCCLRM 1110 1100 1.01 1111 .... 1010 imm:8 vd=%vd_sp size=2
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# FP system register accesses: these are a special case because accesses
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# to FPCXT_NS succeed even if the FPU is disabled. We therefore need
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# to handle them before the big NOCP blocks. Note that within these
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# insns NOCP still has higher priority than UNDEFs; this is implemented
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# by their returning 'false' for UNDEF so as to fall through into the
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# NOCP check (in contrast to VLLDM etc, which call unallocated_encoding()
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# for the UNDEFs there that must take precedence over NOCP.)
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VMSR_VMRS ---- 1110 111 l:1 reg:4 rt:4 1010 0001 0000
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# P=0 W=0 is SEE "Related encodings", so split into two patterns
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VLDR_sysreg ---- 110 1 . . w:1 1 .... ... 0 111 11 ....... @vldr_sysreg p=1
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VLDR_sysreg ---- 110 0 . . 1 1 .... ... 0 111 11 ....... @vldr_sysreg p=0 w=1
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VSTR_sysreg ---- 110 1 . . w:1 0 .... ... 0 111 11 ....... @vldr_sysreg p=1
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VSTR_sysreg ---- 110 0 . . 1 0 .... ... 0 111 11 ....... @vldr_sysreg p=0 w=1
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NOCP 111- 1110 ---- ---- ---- cp:4 ---- ---- &nocp
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NOCP 111- 110- ---- ---- ---- cp:4 ---- ---- &nocp
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# From v8.1M onwards this range will also NOCP:
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NOCP_8_1 111- 1111 ---- ---- ---- ---- ---- ---- &nocp cp=10
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}
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