4713720a78
Forward-define the type first, then use it for the ohci_die() handler. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20230220150515.32549-3-philmd@linaro.org>
125 lines
3.1 KiB
C
125 lines
3.1 KiB
C
/*
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* QEMU USB OHCI Emulation
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* Copyright (c) 2004 Gianni Tedesco
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* Copyright (c) 2006 CodeSourcery
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* Copyright (c) 2006 Openedhand Ltd.
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*
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* This library is free software; you can redistribute it and/or
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* modify it under the terms of the GNU Lesser General Public
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* License as published by the Free Software Foundation; either
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* version 2.1 of the License, or (at your option) any later version.
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*
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* This library is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* Lesser General Public License for more details.
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*
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* You should have received a copy of the GNU Lesser General Public
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* License along with this library; if not, see <http://www.gnu.org/licenses/>.
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*/
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#ifndef HCD_OHCI_H
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#define HCD_OHCI_H
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#include "hw/sysbus.h"
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#include "sysemu/dma.h"
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#include "hw/usb.h"
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#include "qom/object.h"
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/* Number of Downstream Ports on the root hub: */
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#define OHCI_MAX_PORTS 15
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typedef struct OHCIPort {
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USBPort port;
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uint32_t ctrl;
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} OHCIPort;
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typedef struct OHCIState OHCIState;
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struct OHCIState {
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USBBus bus;
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qemu_irq irq;
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MemoryRegion mem;
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AddressSpace *as;
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uint32_t num_ports;
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const char *name;
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QEMUTimer *eof_timer;
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int64_t sof_time;
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/* OHCI state */
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/* Control partition */
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uint32_t ctl, status;
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uint32_t intr_status;
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uint32_t intr;
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/* memory pointer partition */
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uint32_t hcca;
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uint32_t ctrl_head, ctrl_cur;
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uint32_t bulk_head, bulk_cur;
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uint32_t per_cur;
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uint32_t done;
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int32_t done_count;
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/* Frame counter partition */
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uint16_t fsmps;
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uint8_t fit;
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uint16_t fi;
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uint8_t frt;
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uint16_t frame_number;
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uint16_t padding;
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uint32_t pstart;
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uint32_t lst;
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/* Root Hub partition */
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uint32_t rhdesc_a, rhdesc_b;
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uint32_t rhstatus;
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OHCIPort rhport[OHCI_MAX_PORTS];
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/* PXA27x Non-OHCI events */
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uint32_t hstatus;
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uint32_t hmask;
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uint32_t hreset;
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uint32_t htest;
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/* SM501 local memory offset */
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dma_addr_t localmem_base;
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/* Active packets. */
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uint32_t old_ctl;
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USBPacket usb_packet;
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uint8_t usb_buf[8192];
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uint32_t async_td;
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bool async_complete;
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void (*ohci_die)(OHCIState *ohci);
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};
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#define TYPE_SYSBUS_OHCI "sysbus-ohci"
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OBJECT_DECLARE_SIMPLE_TYPE(OHCISysBusState, SYSBUS_OHCI)
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struct OHCISysBusState {
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/*< private >*/
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SysBusDevice parent_obj;
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/*< public >*/
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OHCIState ohci;
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char *masterbus;
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uint32_t num_ports;
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uint32_t firstport;
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dma_addr_t dma_offset;
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};
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extern const VMStateDescription vmstate_ohci_state;
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void usb_ohci_init(OHCIState *ohci, DeviceState *dev, uint32_t num_ports,
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dma_addr_t localmem_base, char *masterbus,
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uint32_t firstport, AddressSpace *as,
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void (*ohci_die_fn)(OHCIState *), Error **errp);
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void ohci_bus_stop(OHCIState *ohci);
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void ohci_stop_endpoints(OHCIState *ohci);
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void ohci_hard_reset(OHCIState *ohci);
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void ohci_sysbus_die(struct OHCIState *ohci);
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#endif
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