qemu-e2k/linux-user/riscv/target_syscall.h
Khem Raj a7cad953fa riscv: Set 5.4 as minimum kernel version for riscv32
5.4 is first stable API as far as rv32 is concerned see [1]

[1] https://sourceware.org/git/?p=glibc.git;a=commit;h=7a55dd3fb6d2c307a002a16776be84310b9c8989

Signed-off-by: Khem Raj <raj.khem@gmail.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Cc: Palmer Dabbelt <palmer@dabbelt.com>
Cc: Alistair Francis <alistair.francis@wdc.com>
Cc: Bin Meng <bin.meng@windriver.com>
Message-Id: <20211216073111.2890607-1-raj.khem@gmail.com>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
2021-12-20 14:53:31 +10:00

64 lines
1.3 KiB
C

/*
* This struct defines the way the registers are stored on the
* stack during a system call.
*
* Reference: linux/arch/riscv/include/uapi/asm/ptrace.h
*/
#ifndef LINUX_USER_RISCV_TARGET_SYSCALL_H
#define LINUX_USER_RISCV_TARGET_SYSCALL_H
struct target_pt_regs {
abi_long sepc;
abi_long ra;
abi_long sp;
abi_long gp;
abi_long tp;
abi_long t0;
abi_long t1;
abi_long t2;
abi_long s0;
abi_long s1;
abi_long a0;
abi_long a1;
abi_long a2;
abi_long a3;
abi_long a4;
abi_long a5;
abi_long a6;
abi_long a7;
abi_long s2;
abi_long s3;
abi_long s4;
abi_long s5;
abi_long s6;
abi_long s7;
abi_long s8;
abi_long s9;
abi_long s10;
abi_long s11;
abi_long t3;
abi_long t4;
abi_long t5;
abi_long t6;
};
#ifdef TARGET_RISCV32
#define UNAME_MACHINE "riscv32"
#define UNAME_MINIMUM_RELEASE "5.4.0"
#else
#define UNAME_MACHINE "riscv64"
#define UNAME_MINIMUM_RELEASE "4.15.0"
#endif
#define TARGET_MINSIGSTKSZ 2048
#define TARGET_MCL_CURRENT 1
#define TARGET_MCL_FUTURE 2
#define TARGET_MCL_ONFAULT 4
/* clone(flags, newsp, ptidptr, tls, ctidptr) for RISC-V */
/* This comes from linux/kernel/fork.c, CONFIG_CLONE_BACKWARDS */
#define TARGET_CLONE_BACKWARDS
#endif