qemu-e2k/disas
Yang Liu 07f4964d17 disas/riscv.c: rvv: Add disas support for vector instructions
Tested with https://github.com/ksco/rvv-decoder-tests

Expected checkpatch errors for consistency and brevity reasons:

ERROR: line over 90 characters
ERROR: trailing statements should be on next line
ERROR: braces {} are necessary for all arms of this statement

Signed-off-by: Yang Liu <liuyang22@iscas.ac.cn>
Acked-by: Alistair Francis <alistair.francis@wdc.com>
Message-Id: <20220928051842.16207-1-liuyang22@iscas.ac.cn>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
2022-10-14 14:29:50 +10:00
..
alpha.c
capstone.c disas: use result of ->read_memory_func 2022-10-06 11:53:40 +01:00
cris.c
hexagon.c Hexagon (disas/hexagon.c) fix memory leak for early exit cases 2021-08-12 09:06:05 -05:00
hppa.c disas/: fix some comment spelling errors 2020-09-17 20:40:08 +02:00
m68k.c disas/: fix some comment spelling errors 2020-09-17 20:40:08 +02:00
meson.build disas: Remove libvixl disassembler 2022-07-05 10:15:49 +02:00
microblaze.c
mips.c
nanomips.cpp include/disas/dis-asm.h: Handle being included outside 'extern "C"' 2021-05-10 17:21:54 +01:00
nanomips.h
nios2.c disas/nios2: Simplify endianess conversion 2021-10-22 18:07:30 +02:00
riscv.c disas/riscv.c: rvv: Add disas support for vector instructions 2022-10-14 14:29:50 +10:00
sh4.c
sparc.c
xtensa.c