qemu-e2k/hw/pci-host
Philippe Mathieu-Daudé 883f2c591f bulk: Rename TARGET_FMT_plx -> HWADDR_FMT_plx
The 'hwaddr' type is defined in "exec/hwaddr.h" as:

    hwaddr is the type of a physical address
   (its size can be different from 'target_ulong').

All definitions use the 'HWADDR_' prefix, except TARGET_FMT_plx:

 $ fgrep define include/exec/hwaddr.h
 #define HWADDR_H
 #define HWADDR_BITS 64
 #define HWADDR_MAX UINT64_MAX
 #define TARGET_FMT_plx "%016" PRIx64
         ^^^^^^
 #define HWADDR_PRId PRId64
 #define HWADDR_PRIi PRIi64
 #define HWADDR_PRIo PRIo64
 #define HWADDR_PRIu PRIu64
 #define HWADDR_PRIx PRIx64
 #define HWADDR_PRIX PRIX64

Since hwaddr's size can be *different* from target_ulong, it is
very confusing to read one of its format using the 'TARGET_FMT_'
prefix, normally used for the target_long / target_ulong types:

$ fgrep TARGET_FMT_ include/exec/cpu-defs.h
 #define TARGET_FMT_lx "%08x"
 #define TARGET_FMT_ld "%d"
 #define TARGET_FMT_lu "%u"
 #define TARGET_FMT_lx "%016" PRIx64
 #define TARGET_FMT_ld "%" PRId64
 #define TARGET_FMT_lu "%" PRIu64

Apparently this format was missed during commit a8170e5e97
("Rename target_phys_addr_t to hwaddr"), so complete it by
doing a bulk-rename with:

 $ sed -i -e s/TARGET_FMT_plx/HWADDR_FMT_plx/g $(git grep -l TARGET_FMT_plx)

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-Id: <20230110212947.34557-1-philmd@linaro.org>
[thuth: Fix some warnings from checkpatch.pl along the way]
Signed-off-by: Thomas Huth <thuth@redhat.com>
2023-01-18 11:14:34 +01:00
..
bonito.c bulk: Rename TARGET_FMT_plx -> HWADDR_FMT_plx 2023-01-18 11:14:34 +01:00
designware.c pci: drop redundant PCIDeviceClass::is_bridge field 2022-12-21 07:32:24 -05:00
dino.c include/hw/pci: Split pci_device.h off pci.h 2023-01-08 01:54:22 -05:00
gpex-acpi.c hw/pci-host/gpex-acpi: Add support for dsdt construction for pxb-cxl 2022-05-13 07:57:26 -04:00
gpex.c hw/pci-host/gpex: Don't fault for unmapped parts of MMIO and PIO windows 2021-04-30 11:16:52 +01:00
grackle.c include/hw/pci: Split pci_device.h off pci.h 2023-01-08 01:54:22 -05:00
gt64120.c hw/mips/gt64xxx_pci: Move it to hw/pci-host/ 2023-01-13 09:32:32 +01:00
i440fx.c i386/pc: create pci-host qdev prior to pc_memory_init() 2022-07-26 10:40:58 -04:00
Kconfig hw/mips/gt64xxx_pci: Move it to hw/pci-host/ 2023-01-13 09:32:32 +01:00
meson.build hw/mips/gt64xxx_pci: Move it to hw/pci-host/ 2023-01-13 09:32:32 +01:00
mv643xx.h hw/pci-host: Add emulation of Marvell MV64361 PPC system controller 2021-05-04 11:41:25 +10:00
mv64361.c include/hw/pci: Split pci_device.h off pci.h 2023-01-08 01:54:22 -05:00
pam.c
pnv_phb3_msi.c hw/pci-host/pnv_phb3_msi: Convert TYPE_PHB3_MSI to 3-phase reset 2022-12-16 15:59:07 +00:00
pnv_phb3_pbcq.c Remove qemu-common.h include from most units 2022-04-06 14:31:55 +02:00
pnv_phb3.c hw/pci-host: pnv_phb{3, 4}: Fix heap out-of-bound access failure 2022-09-20 12:31:53 -03:00
pnv_phb4_pec.c ppc/pnv: enable user created pnv-phb for powernv9 2022-08-31 14:08:06 -03:00
pnv_phb4.c hw/pci-host: pnv_phb{3, 4}: Fix heap out-of-bound access failure 2022-09-20 12:31:53 -03:00
pnv_phb.c pci: Convert child classes of TYPE_PCIE_ROOT_PORT to 3-phase reset 2022-12-16 15:59:07 +00:00
pnv_phb.h ppc/pnv: add pnv-phb-root-port device 2022-08-31 14:08:05 -03:00
ppce500.c bulk: Rename TARGET_FMT_plx -> HWADDR_FMT_plx 2023-01-18 11:14:34 +01:00
q35.c q35:Enable TSEG only when G_SMRAME and TSEG_EN both enabled 2022-06-15 11:11:37 +02:00
raven.c hw/pci/pci: Factor out pci_bus_map_irqs() from pci_bus_irqs() 2023-01-13 16:22:57 +01:00
remote.c Remove qemu-common.h include from most units 2022-04-06 14:31:55 +02:00
sabre.c Do not include exec/address-spaces.h if it's not really necessary 2021-05-02 17:24:51 +02:00
sh_pci.c include/hw/pci: Split pci_device.h off pci.h 2023-01-08 01:54:22 -05:00
trace-events hw/mips/gt64xxx_pci: Move it to hw/pci-host/ 2023-01-13 09:32:32 +01:00
trace.h
uninorth.c include/hw/pci: Split pci_device.h off pci.h 2023-01-08 01:54:22 -05:00
versatile.c hw/pci/pci: Factor out pci_bus_map_irqs() from pci_bus_irqs() 2023-01-13 16:22:57 +01:00
xen_igd_pt.c
xilinx-pcie.c pci: drop redundant PCIDeviceClass::is_bridge field 2022-12-21 07:32:24 -05:00