Aaron Lindsay 887c0f1544 target/arm: Don't do raw writes for PMINTENCLR ... Raw writes to this register when in KVM mode can cause interrupts to be raised (even when the PMU is disabled). Because the underlying state is already aliased to PMINTENSET (which already provides raw write functions), we can safely disable raw accesses to PMINTENCLR entirely. Signed-off-by: Aaron Lindsay <aaron@os.amperecomputing.com> Message-id: 20200707152616.1917154-1-aaron@os.amperecomputing.com Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>		2020-07-13 14:36:08 +01:00
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alpha
arm	target/arm: Don't do raw writes for PMINTENCLR	2020-07-13 14:36:08 +01:00
avr	target/avr/disas: Fix store instructions display order	2020-07-11 11:02:05 +02:00
cris
hppa
i386	apic: Report current_count via 'info lapic'	2020-07-10 19:26:55 -04:00
lm32
m68k	target/m68k: consolidate physical translation offset into get_physical_address()	2020-07-06 21:39:57 +02:00
microblaze
mips	hw/mips: Implement the kvm_type() hook in MachineClass	2020-06-27 19:35:39 +02:00
moxie
nios2
openrisc
ppc	error: Eliminate error_propagate() with Coccinelle, part 1	2020-07-10 15:18:08 +02:00
riscv	target/riscv: configure and turn on vector extension from command line	2020-07-02 09:19:34 -07:00
rx
s390x	error: Eliminate error_propagate() with Coccinelle, part 1	2020-07-10 15:18:08 +02:00
sh4
sparc	error: Eliminate error_propagate() with Coccinelle, part 1	2020-07-10 15:18:08 +02:00
tilegx
tricore
unicore32
xtensa