Peter Maydell
514b4f361b
nvic: Expose NMI line
...
On real v7M hardware, the NMI line is an externally visible signal
that an SoC or board can toggle to assert an NMI. Expose it in
our QEMU NVIC and armv7m container objects so that a board model
can wire it up if it needs to.
In particular, the MPS2 watchdog is wired to NMI.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
2018-08-20 11:24:33 +01:00
..
2017-09-27 11:35:59 +01:00
2017-12-22 15:01:19 +01:00
2018-08-14 17:17:20 +01:00
2018-08-14 17:17:20 +01:00
2018-08-14 17:17:21 +01:00
2018-08-06 16:19:33 +01:00
2018-08-14 17:17:21 +01:00
2018-06-22 13:28:34 +01:00
2018-01-11 13:25:40 +00:00
2018-08-20 11:24:31 +01:00
2018-06-22 13:28:36 +01:00
2018-06-22 13:28:34 +01:00
2018-06-22 13:28:36 +01:00
2018-08-20 11:24:33 +01:00
2017-05-17 10:37:00 -03:00
2018-07-23 15:21:27 +01:00
2018-08-14 17:17:20 +01:00
2017-02-28 17:10:00 +00:00
2018-01-24 19:19:50 +00:00
2018-04-27 18:05:22 +10:00
2017-12-21 09:30:32 +01:00
2018-02-05 13:54:38 +01:00
2018-02-09 10:40:30 +00:00
2018-06-28 19:05:37 +02:00
2018-07-06 18:39:19 +02:00
2017-12-18 17:07:03 +03:00
2018-02-09 10:40:30 +00:00
2017-02-21 22:24:58 +00:00
2017-05-17 10:37:00 -03:00
2018-01-22 09:46:18 +01:00
2017-10-21 06:35:47 +09:00
2018-03-06 14:01:27 +01:00
2018-03-06 13:16:29 +11:00
2018-07-17 13:12:49 +01:00
2018-02-09 09:37:13 +01:00
2018-02-26 12:55:26 +01:00
2018-01-09 21:48:20 +00:00
2018-08-20 11:24:33 +01:00
2018-07-03 09:56:51 +10:00
2018-07-03 09:56:51 +10:00
2018-02-09 13:50:17 +01:00
2018-07-16 11:18:09 +10:00
2018-01-26 11:09:09 +01:00
2018-01-26 11:09:09 +01:00