376253ece4
Refactor the monitor API and prepare it for decoupled terminals: term_print functions are renamed to monitor_* and all monitor services gain a new parameter (mon) that will once refer to the monitor instance the output is supposed to appear on. However, the argument remains unused for now. All monitor command callbacks are also extended by a mon parameter so that command handlers are able to pass an appropriate reference to monitor output services. For the case that monitor outputs so far happen without clearly identifiable context, the global variable cur_mon is introduced that shall once provide a pointer either to the current active monitor (while processing commands) or to the default one. On the mid or long term, those use case will be obsoleted so that this variable can be removed again. Due to the broad usage of the monitor interface, this patch mostly deals with converting users of the monitor API. A few of them are already extended to pass 'mon' from the command handler further down to internal functions that invoke monitor_printf. At this chance, monitor-related prototypes are moved from console.h to a new monitor.h. The same is done for the readline API. Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6711 c046a42c-6fe2-441c-8c8c-71466251a162
74 lines
2.6 KiB
C
74 lines
2.6 KiB
C
#ifndef SUN4M_H
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#define SUN4M_H
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#include "qemu-common.h"
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/* Devices used by sparc32 system. */
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/* iommu.c */
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void *iommu_init(target_phys_addr_t addr, uint32_t version, qemu_irq irq);
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void sparc_iommu_memory_rw(void *opaque, target_phys_addr_t addr,
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uint8_t *buf, int len, int is_write);
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static inline void sparc_iommu_memory_read(void *opaque,
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target_phys_addr_t addr,
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uint8_t *buf, int len)
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{
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sparc_iommu_memory_rw(opaque, addr, buf, len, 0);
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}
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static inline void sparc_iommu_memory_write(void *opaque,
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target_phys_addr_t addr,
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uint8_t *buf, int len)
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{
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sparc_iommu_memory_rw(opaque, addr, buf, len, 1);
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}
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/* tcx.c */
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void tcx_init(target_phys_addr_t addr, uint8_t *vram_base,
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unsigned long vram_offset, int vram_size, int width, int height,
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int depth);
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/* slavio_intctl.c */
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void *slavio_intctl_init(target_phys_addr_t addr, target_phys_addr_t addrg,
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const uint32_t *intbit_to_level,
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qemu_irq **irq, qemu_irq **cpu_irq,
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qemu_irq **parent_irq, unsigned int cputimer);
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void slavio_pic_info(Monitor *mon, void *opaque);
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void slavio_irq_info(Monitor *mon, void *opaque);
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/* sbi.c */
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void *sbi_init(target_phys_addr_t addr, qemu_irq **irq, qemu_irq **cpu_irq,
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qemu_irq **parent_irq);
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/* sun4c_intctl.c */
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void *sun4c_intctl_init(target_phys_addr_t addr, qemu_irq **irq,
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qemu_irq *parent_irq);
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void sun4c_pic_info(Monitor *mon, void *opaque);
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void sun4c_irq_info(Monitor *mon, void *opaque);
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/* slavio_timer.c */
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void slavio_timer_init_all(target_phys_addr_t base, qemu_irq master_irq,
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qemu_irq *cpu_irqs, unsigned int num_cpus);
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/* slavio_misc.c */
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void *slavio_misc_init(target_phys_addr_t base, target_phys_addr_t power_base,
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target_phys_addr_t aux1_base,
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target_phys_addr_t aux2_base, qemu_irq irq,
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qemu_irq cpu_halt, qemu_irq **fdc_tc);
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void slavio_set_power_fail(void *opaque, int power_failing);
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/* cs4231.c */
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void cs_init(target_phys_addr_t base, int irq, void *intctl);
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/* sparc32_dma.c */
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#include "sparc32_dma.h"
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/* pcnet.c */
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void lance_init(NICInfo *nd, target_phys_addr_t leaddr, void *dma_opaque,
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qemu_irq irq, qemu_irq *reset);
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/* eccmemctl.c */
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void *ecc_init(target_phys_addr_t base, qemu_irq irq, uint32_t version);
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#endif
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