Laurent Vivier 250b1da35d target/m68k: implement opcode fetoxm1 ...

Example provided in the launchpad bug fails with:

   qemu: uncaught target signal 4 (Illegal instruction) - core dumped
   Illegal instruction (core dumped)

It appears fetoxm1 is not implemented:

   IN: expm1f
   0x800005cc: fetoxm1x %fp2,%fp0
   Disassembler disagrees with translator over instruction decoding
   Please report this to qemu-devel@nongnu.org

   (gdb) x/2hx 0x800005cc
   0x800005cc: 0xf200 0x0808

This patch adds the instruction.

Bug: https://bugs.launchpad.net/qemu/+bug/1881450
Signed-off-by: Laurent Vivier <laurent@vivier.eu>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20200531131951.631902-1-laurent@vivier.eu>
Signed-off-by: Laurent Vivier <laurent@vivier.eu>

2020-06-02 13:59:02 +02:00

..

cpu-param.h

…

cpu-qom.h

…

cpu.c

…

cpu.h

…

fpu_helper.c

target/m68k: implement opcode fetoxm1

2020-06-02 13:59:02 +02:00

gdbstub.c

…

helper.c

…

helper.h

target/m68k: implement opcode fetoxm1

2020-06-02 13:59:02 +02:00

m68k-semi.c

…

Makefile.objs

…

monitor.c

…

op_helper.c

…

qregs.def

…

softfloat_fpsp_tables.h

…

softfloat.c

softfloat: Replace flag with bool

2020-05-19 08:40:50 -07:00

softfloat.h

…

translate.c

target/m68k: implement opcode fetoxm1

2020-06-02 13:59:02 +02:00