qemu-e2k/target-microblaze
Benjamin Herrenschmidt 97ed5ccdee tlb: Add "ifetch" argument to cpu_mmu_index()
This is set to true when the index is for an instruction fetch
translation.

The core get_page_addr_code() sets it, as do the SOFTMMU_CODE_ACCESS
acessors.

All targets ignore it for now, and all other callers pass "false".

This will allow targets who wish to split the mmu index between
instruction and data accesses to do so. A subsequent patch will
do just that for PowerPC.

Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Message-Id: <1439796853-4410-2-git-send-email-benh@kernel.crashing.org>
Signed-off-by: Richard Henderson <rth@twiddle.net>
2015-09-11 08:15:28 -07:00
..
cpu-qom.h target-microblaze: Convert pvr-full to a CPU property 2015-06-21 17:20:16 +10:00
cpu.c disas: microblaze: QOMify target specific disas setup 2015-07-09 15:20:41 +02:00
cpu.h tlb: Add "ifetch" argument to cpu_mmu_index() 2015-09-11 08:15:28 -07:00
gdbstub.c
helper.c target-microblaze: Convert pvr-full to a CPU property 2015-06-21 17:20:16 +10:00
helper.h tcg: Invert the inclusion of helper.h 2014-05-28 09:33:54 -07:00
Makefile.objs
microblaze-decode.h
mmu.c tlb: Add "ifetch" argument to cpu_mmu_index() 2015-09-11 08:15:28 -07:00
mmu.h microblaze: mmu: Delete flip_um fn prototype 2015-04-30 16:05:48 +03:00
op_helper.c maint: remove unused include for assert.h 2015-09-11 10:21:38 +03:00
translate.c tlb: Add "ifetch" argument to cpu_mmu_index() 2015-09-11 08:15:28 -07:00