qemu-e2k/include/hw/pci-host/sabre.h
Markus Armbruster edf5ca5dbe include/hw/pci: Split pci_device.h off pci.h
PCIDeviceClass and PCIDevice are defined in pci.h.  Many users of the
header don't actually need them.  Similar structs live in their own
headers: PCIBusClass and PCIBus in pci_bus.h, PCIBridge in
pci_bridge.h, PCIHostBridgeClass and PCIHostState in pci_host.h,
PCIExpressHost in pcie_host.h, and PCIERootPortClass, PCIEPort, and
PCIESlot in pcie_port.h.

Move PCIDeviceClass and PCIDeviceClass to new pci_device.h, along with
the code that needs them.  Adjust include directives.

This also enables the next commit.

Signed-off-by: Markus Armbruster <armbru@redhat.com>
Message-Id: <20221222100330.380143-6-armbru@redhat.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2023-01-08 01:54:22 -05:00

54 lines
1.2 KiB
C

#ifndef HW_PCI_HOST_SABRE_H
#define HW_PCI_HOST_SABRE_H
#include "hw/pci/pci_device.h"
#include "hw/pci/pci_host.h"
#include "hw/sparc/sun4u_iommu.h"
#include "qom/object.h"
#define MAX_IVEC 0x40
/* OBIO IVEC IRQs */
#define OBIO_HDD_IRQ 0x20
#define OBIO_NIC_IRQ 0x21
#define OBIO_LPT_IRQ 0x22
#define OBIO_FDD_IRQ 0x27
#define OBIO_KBD_IRQ 0x29
#define OBIO_MSE_IRQ 0x2a
#define OBIO_SER_IRQ 0x2b
struct SabrePCIState {
PCIDevice parent_obj;
};
#define TYPE_SABRE_PCI_DEVICE "sabre-pci"
OBJECT_DECLARE_SIMPLE_TYPE(SabrePCIState, SABRE_PCI_DEVICE)
struct SabreState {
PCIHostState parent_obj;
hwaddr special_base;
hwaddr mem_base;
MemoryRegion sabre_config;
MemoryRegion pci_config;
MemoryRegion pci_mmio;
MemoryRegion pci_ioport;
uint64_t pci_irq_in;
IOMMUState *iommu;
PCIBridge *bridgeA;
PCIBridge *bridgeB;
uint32_t pci_control[16];
uint32_t pci_irq_map[8];
uint32_t pci_err_irq_map[4];
uint32_t obio_irq_map[32];
qemu_irq ivec_irqs[MAX_IVEC];
unsigned int irq_request;
uint32_t reset_control;
unsigned int nr_resets;
};
#define TYPE_SABRE "sabre"
OBJECT_DECLARE_SIMPLE_TYPE(SabreState, SABRE)
#endif