55903f1d2d
Starting with commit 1c380f9460
dma
transfers can actually fail. This patch makes ehci keep track
of the busmaster bit in pci config space, by setting/clearing the
dma_context pointer. Attempts to dma without context will result
in raising HSE (Host System Error) interrupt and stopping the host
controller.
This patch fixes WinXP not booting with a usb stick attached to ehci.
Root cause is seabios activating ehci so you can boot from the stick,
and WinXP clearing the busmaster bit before resetting the host
controller, leading to ehci actually trying dma while it is disabled.
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
219 lines
6.3 KiB
C
219 lines
6.3 KiB
C
/*
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* QEMU USB EHCI Emulation
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*
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* This library is free software; you can redistribute it and/or
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* modify it under the terms of the GNU Lesser General Public
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* License as published by the Free Software Foundation; either
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* version 2 of the License, or(at your option) any later version.
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*
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* This library is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* Lesser General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, see <http://www.gnu.org/licenses/>.
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*/
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#include "hw/usb/hcd-ehci.h"
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#include "hw/pci.h"
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#include "range.h"
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typedef struct EHCIPCIState {
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PCIDevice pcidev;
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EHCIState ehci;
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} EHCIPCIState;
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typedef struct EHCIPCIInfo {
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const char *name;
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uint16_t vendor_id;
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uint16_t device_id;
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uint8_t revision;
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} EHCIPCIInfo;
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static int usb_ehci_pci_initfn(PCIDevice *dev)
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{
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EHCIPCIState *i = DO_UPCAST(EHCIPCIState, pcidev, dev);
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EHCIState *s = &i->ehci;
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uint8_t *pci_conf = dev->config;
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pci_set_byte(&pci_conf[PCI_CLASS_PROG], 0x20);
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/* capabilities pointer */
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pci_set_byte(&pci_conf[PCI_CAPABILITY_LIST], 0x00);
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/* pci_set_byte(&pci_conf[PCI_CAPABILITY_LIST], 0x50); */
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pci_set_byte(&pci_conf[PCI_INTERRUPT_PIN], 4); /* interrupt pin D */
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pci_set_byte(&pci_conf[PCI_MIN_GNT], 0);
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pci_set_byte(&pci_conf[PCI_MAX_LAT], 0);
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/* pci_conf[0x50] = 0x01; *//* power management caps */
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pci_set_byte(&pci_conf[USB_SBRN], USB_RELEASE_2); /* release # (2.1.4) */
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pci_set_byte(&pci_conf[0x61], 0x20); /* frame length adjustment (2.1.5) */
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pci_set_word(&pci_conf[0x62], 0x00); /* port wake up capability (2.1.6) */
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pci_conf[0x64] = 0x00;
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pci_conf[0x65] = 0x00;
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pci_conf[0x66] = 0x00;
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pci_conf[0x67] = 0x00;
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pci_conf[0x68] = 0x01;
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pci_conf[0x69] = 0x00;
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pci_conf[0x6a] = 0x00;
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pci_conf[0x6b] = 0x00; /* USBLEGSUP */
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pci_conf[0x6c] = 0x00;
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pci_conf[0x6d] = 0x00;
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pci_conf[0x6e] = 0x00;
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pci_conf[0x6f] = 0xc0; /* USBLEFCTLSTS */
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s->caps[0x09] = 0x68; /* EECP */
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s->irq = dev->irq[3];
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s->dma = pci_dma_context(dev);
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s->capsbase = 0x00;
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s->opregbase = 0x20;
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usb_ehci_initfn(s, DEVICE(dev));
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pci_register_bar(dev, 0, PCI_BASE_ADDRESS_SPACE_MEMORY, &s->mem);
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return 0;
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}
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static void usb_ehci_pci_write_config(PCIDevice *dev, uint32_t addr,
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uint32_t val, int l)
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{
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EHCIPCIState *i = DO_UPCAST(EHCIPCIState, pcidev, dev);
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bool busmaster;
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pci_default_write_config(dev, addr, val, l);
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if (!range_covers_byte(addr, l, PCI_COMMAND)) {
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return;
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}
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busmaster = pci_get_word(dev->config + PCI_COMMAND) & PCI_COMMAND_MASTER;
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i->ehci.dma = busmaster ? pci_dma_context(dev) : NULL;
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}
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static Property ehci_pci_properties[] = {
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DEFINE_PROP_UINT32("maxframes", EHCIPCIState, ehci.maxframes, 128),
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DEFINE_PROP_END_OF_LIST(),
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};
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static const VMStateDescription vmstate_ehci_pci = {
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.name = "ehci",
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.version_id = 2,
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.minimum_version_id = 1,
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.fields = (VMStateField[]) {
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VMSTATE_PCI_DEVICE(pcidev, EHCIPCIState),
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VMSTATE_STRUCT(ehci, EHCIPCIState, 2, vmstate_ehci, EHCIState),
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VMSTATE_END_OF_LIST()
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}
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};
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static void ehci_class_init(ObjectClass *klass, void *data)
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{
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DeviceClass *dc = DEVICE_CLASS(klass);
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PCIDeviceClass *k = PCI_DEVICE_CLASS(klass);
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EHCIPCIInfo *i = data;
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k->init = usb_ehci_pci_initfn;
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k->vendor_id = i->vendor_id;
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k->device_id = i->device_id;
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k->revision = i->revision;
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k->class_id = PCI_CLASS_SERIAL_USB;
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k->config_write = usb_ehci_pci_write_config;
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dc->vmsd = &vmstate_ehci_pci;
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dc->props = ehci_pci_properties;
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}
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static struct EHCIPCIInfo ehci_pci_info[] = {
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{
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.name = "usb-ehci",
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.vendor_id = PCI_VENDOR_ID_INTEL,
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.device_id = PCI_DEVICE_ID_INTEL_82801D, /* ich4 */
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.revision = 0x10,
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},{
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.name = "ich9-usb-ehci1", /* 00:1d.7 */
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.vendor_id = PCI_VENDOR_ID_INTEL,
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.device_id = PCI_DEVICE_ID_INTEL_82801I_EHCI1,
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.revision = 0x03,
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},{
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.name = "ich9-usb-ehci2", /* 00:1a.7 */
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.vendor_id = PCI_VENDOR_ID_INTEL,
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.device_id = PCI_DEVICE_ID_INTEL_82801I_EHCI2,
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.revision = 0x03,
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}
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};
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static void ehci_pci_register_types(void)
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{
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TypeInfo ehci_type_info = {
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.parent = TYPE_PCI_DEVICE,
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.instance_size = sizeof(EHCIPCIState),
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.class_init = ehci_class_init,
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};
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int i;
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for (i = 0; i < ARRAY_SIZE(ehci_pci_info); i++) {
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ehci_type_info.name = ehci_pci_info[i].name;
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ehci_type_info.class_data = ehci_pci_info + i;
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type_register(&ehci_type_info);
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}
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}
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type_init(ehci_pci_register_types)
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struct ehci_companions {
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const char *name;
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int func;
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int port;
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};
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static const struct ehci_companions ich9_1d[] = {
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{ .name = "ich9-usb-uhci1", .func = 0, .port = 0 },
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{ .name = "ich9-usb-uhci2", .func = 1, .port = 2 },
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{ .name = "ich9-usb-uhci3", .func = 2, .port = 4 },
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};
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static const struct ehci_companions ich9_1a[] = {
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{ .name = "ich9-usb-uhci4", .func = 0, .port = 0 },
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{ .name = "ich9-usb-uhci5", .func = 1, .port = 2 },
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{ .name = "ich9-usb-uhci6", .func = 2, .port = 4 },
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};
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int ehci_create_ich9_with_companions(PCIBus *bus, int slot)
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{
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const struct ehci_companions *comp;
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PCIDevice *ehci, *uhci;
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BusState *usbbus;
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const char *name;
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int i;
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switch (slot) {
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case 0x1d:
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name = "ich9-usb-ehci1";
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comp = ich9_1d;
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break;
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case 0x1a:
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name = "ich9-usb-ehci2";
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comp = ich9_1a;
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break;
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default:
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return -1;
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}
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ehci = pci_create_multifunction(bus, PCI_DEVFN(slot, 7), true, name);
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qdev_init_nofail(&ehci->qdev);
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usbbus = QLIST_FIRST(&ehci->qdev.child_bus);
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for (i = 0; i < 3; i++) {
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uhci = pci_create_multifunction(bus, PCI_DEVFN(slot, comp[i].func),
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true, comp[i].name);
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qdev_prop_set_string(&uhci->qdev, "masterbus", usbbus->name);
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qdev_prop_set_uint32(&uhci->qdev, "firstport", comp[i].port);
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qdev_init_nofail(&uhci->qdev);
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}
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return 0;
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}
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