qemu-e2k/target/ppc/translate
Matthieu Bucchianeri 8dcdb535d7 target/ppc: Fix SPE unavailable exception triggering
When emulating certain floating point instructions or vector instructions on
PowerPC machines, QEMU did not properly generate the SPE/Embedded Floating-
Point Unavailable interrupt. See the buglink further below for references to
the relevant NXP documentation.

This patch fixes the behavior of some evfs* instructions that were
incorrectly emitting the interrupt.

More importantly, this patch fixes the behavior of several efd* and ev*
instructions that were not generating the interrupt. Triggering the
interrupt for these instructions fixes lazy FPU/vector context switching on
some operating systems like Linux.

Without this patch, the result of some double-precision arithmetic could be
corrupted due to the lack of proper saving and restoring of the upper
32-bit part of the general-purpose registers.

Buglink: https://bugs.launchpad.net/qemu/+bug/1888918
Buglink: https://bugs.launchpad.net/qemu/+bug/1611394
Signed-off-by: Matthieu Bucchianeri <matthieu.bucchianeri@leostella.com>
Message-Id: <20200727175553.32276-1-matthieu.bucchianeri@leostella.com>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2020-08-12 13:16:27 +10:00
..
dfp-impl.inc.c
dfp-ops.inc.c
fp-impl.inc.c target/ppc: Fix typo in comments 2020-02-21 09:15:04 +11:00
fp-ops.inc.c ppc: Add support for 'mffsce' instruction 2019-10-04 10:25:23 +10:00
spe-impl.inc.c target/ppc: Fix SPE unavailable exception triggering 2020-08-12 13:16:27 +10:00
spe-ops.inc.c
vmx-impl.inc.c target/ppc: add vmulh{su}d instructions 2020-08-12 13:16:27 +10:00
vmx-ops.inc.c target/ppc: add vmulh{su}d instructions 2020-08-12 13:16:27 +10:00
vsx-impl.inc.c target/ppc: Use tcg_gen_gvec_dup_imm 2020-05-06 09:25:01 -07:00
vsx-ops.inc.c target/ppc: improve VSX_FMADD with new GEN_VSX_HELPER_VSX_MADD macro 2019-07-02 09:43:58 +10:00