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According to [1] address bits 27 - 20 are mapped to the bus number (the TLPs bus number field is 8 bits). Below is the formula taken from Table 7-1 in [1]. " Memory Address | PCI Express Configuration Space A[(20+n-1):20] | Bus Number, 1 ≤ n ≤ 8 " [1] PCI Express® Base Specification Revision 5.0 Version 1.0 Signed-off-by: Francisco Iglesias <frasse.iglesias@gmail.com> Message-Id: <20220411221836.17699-2-frasse.iglesias@gmail.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com> |
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msi.h | ||
msix.h | ||
pci_bridge.h | ||
pci_bus.h | ||
pci_host.h | ||
pci_ids.h | ||
pci_regs.h | ||
pci.h | ||
pcie_aer.h | ||
pcie_host.h | ||
pcie_port.h | ||
pcie_regs.h | ||
pcie_sriov.h | ||
pcie.h | ||
shpc.h | ||
slotid_cap.h |