qemu-e2k/target/arm
Peter Maydell 8fe612a183 target/arm: Remove duplicate 'plus1' function from Neon and SVE decode
The Neon and SVE decoders use private 'plus1' functions to implement
"add one" for the !function decoder syntax.  We have a generic
"plus_1" function in translate.h, so use that instead.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-id: 20210715095341.701-1-peter.maydell@linaro.org
2021-07-18 10:59:47 +01:00
..
a32-uncond.decode
a32.decode
arch_dump.c
arm_ldst.h
arm-powerctl.c
arm-powerctl.h
cpu64.c target/arm: Implement MTE3 2021-06-24 14:58:48 +01:00
cpu_tcg.c
cpu-param.h
cpu-qom.h
cpu.c
cpu.h
crypto_helper.c
debug_helper.c
gdbstub64.c
gdbstub.c
helper-a64.c target/arm: Check NaN mode before silencing NaN 2021-07-02 11:48:36 +01:00
helper-a64.h
helper-mve.h target/arm: Implement MVE shifts by register 2021-07-02 11:48:38 +01:00
helper-sve.h
helper.c target/arm: Fix offsets for TTBCR 2021-07-18 10:59:46 +01:00
helper.h target/arm: Implement MVE VLDR/VSTR (non-widening forms) 2021-06-21 16:49:38 +01:00
idau.h
internals.h target/arm: Implement MVE VLDR/VSTR (non-widening forms) 2021-06-21 16:49:38 +01:00
iwmmxt_helper.c
Kconfig meson: Introduce target-specific Kconfig 2021-07-09 18:21:34 +02:00
kvm64.c
kvm_arm.h
kvm-consts.h
kvm-stub.c
kvm.c
m_helper.c
m-nocp.decode target/arm: Don't NOCP fault for FPCXT_NS accesses 2021-06-21 16:49:37 +01:00
machine.c
meson.build target/arm: Implement MVE VLDR/VSTR (non-widening forms) 2021-06-21 16:49:38 +01:00
monitor.c
mte_helper.c target/arm: Implement MTE3 2021-06-24 14:58:48 +01:00
mve_helper.c target/arm: Implement MVE shifts by register 2021-07-02 11:48:38 +01:00
mve.decode target/arm: Implement MVE VADDLV 2021-07-02 11:48:37 +01:00
neon_helper.c
neon-dp.decode
neon-ls.decode target/arm: Remove duplicate 'plus1' function from Neon and SVE decode 2021-07-18 10:59:47 +01:00
neon-shared.decode target/arm: Remove duplicate 'plus1' function from Neon and SVE decode 2021-07-18 10:59:47 +01:00
op_addsub.h
op_helper.c
pauth_helper.c
psci.c
sve_helper.c
sve.decode target/arm: Remove duplicate 'plus1' function from Neon and SVE decode 2021-07-18 10:59:47 +01:00
syndrome.h
t16.decode
t32.decode target/arm: Implement MVE shifts by register 2021-07-02 11:48:38 +01:00
tlb_helper.c
trace-events
trace.h
translate-a32.h target/arm: Make VMOV scalar <-> gpreg beatwise for MVE 2021-06-24 14:58:48 +01:00
translate-a64.c target/arm: Use translator_use_goto_tb for aarch64 2021-07-09 09:42:28 -07:00
translate-a64.h
translate-m-nocp.c target/arm: Handle FPU check for FPCXT_NS insns via vfp_access_check_m() 2021-06-21 16:49:38 +01:00
translate-mve.c target/arm: Implement MVE VADDLV 2021-07-02 11:48:37 +01:00
translate-neon.c target/arm: Remove duplicate 'plus1' function from Neon and SVE decode 2021-07-18 10:59:47 +01:00
translate-sve.c target/arm: Remove duplicate 'plus1' function from Neon and SVE decode 2021-07-18 10:59:47 +01:00
translate-vfp.c target/arm: Make VMOV scalar <-> gpreg beatwise for MVE 2021-06-24 14:58:48 +01:00
translate.c target/arm: Use translator_use_goto_tb for aarch32 2021-07-09 09:42:28 -07:00
translate.h target/arm: Implement MVE shifts by register 2021-07-02 11:48:38 +01:00
vec_helper.c
vec_internal.h
vfp_helper.c target/arm: Check NaN mode before silencing NaN 2021-07-02 11:48:36 +01:00
vfp-uncond.decode
vfp.decode target/arm: Don't NOCP fault for FPCXT_NS accesses 2021-06-21 16:49:37 +01:00