qemu-e2k/target-mips
ths b29a0341d7 EBase is limited to KSEG0/KSEG1 even on 64bit CPUs.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2351 c046a42c-6fe2-441c-8c8c-71466251a162
2007-01-24 18:01:23 +00:00
..
cpu.h EBase is limited to KSEG0/KSEG1 even on 64bit CPUs. 2007-01-24 18:01:23 +00:00
exec.h Reworking MIPS interrupt handling, by Aurelien Jarno. 2007-01-24 01:47:51 +00:00
fop_template.c Preliminiary MIPS64 support, disabled by default due to performance impact. 2006-12-21 01:19:56 +00:00
helper.c Fix PageMask handling, second part. 2007-01-22 20:50:42 +00:00
mips-defs.h Preliminiary MIPS64 support, disabled by default due to performance impact. 2006-12-21 01:19:56 +00:00
op_helper_mem.c Fix lwl/lwr for 64bit emulation, also debug output spec for 64bit emulation. 2007-01-01 20:34:37 +00:00
op_helper.c Reworking MIPS interrupt handling, by Aurelien Jarno. 2007-01-24 01:47:51 +00:00
op_mem.c Preliminiary MIPS64 support, disabled by default due to performance impact. 2006-12-21 01:19:56 +00:00
op_template.c Preliminiary MIPS64 support, disabled by default due to performance impact. 2006-12-21 01:19:56 +00:00
op.c EBase is limited to KSEG0/KSEG1 even on 64bit CPUs. 2007-01-24 18:01:23 +00:00
TODO Update TODO. 2007-01-22 20:57:17 +00:00
translate.c EBase is limited to KSEG0/KSEG1 even on 64bit CPUs. 2007-01-24 18:01:23 +00:00