Stafford Horne 9156ca76cb target/openrisc: Set PC to cpu state on FPU exception
Store the PC to ensure the correct value can be read in the exception
handler.

Signed-off-by: Stafford Horne <shorne@gmail.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
2023-05-11 15:40:03 +01:00
..
2020-08-21 06:30:35 -04:00
2019-09-04 12:59:00 -07:00