Bin Meng 19800265d4 hw/riscv: virt: Map high mmio for PCIe ... Some peripherals require 64-bit PCI address, so let's map the high mmio space for PCIe. For RV32, the address is hardcoded to below 4 GiB from the highest accessible physical address. For RV64, the base address depends on top of RAM and is aligned to its size which is using 16 GiB for now. Signed-off-by: Bin Meng <bin.meng@windriver.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-id: 20210220144807.819-5-bmeng.cn@gmail.com Signed-off-by: Alistair Francis <alistair.francis@wdc.com>		2021-03-04 09:43:29 -05:00
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boot.c
Kconfig
meson.build
microchip_pfsoc.c
numa.c
opentitan.c
riscv_hart.c
sifive_e.c
sifive_u.c
spike.c
virt.c	hw/riscv: virt: Map high mmio for PCIe	2021-03-04 09:43:29 -05:00