qemu-e2k/target/arm
Peter Maydell 76eff04d16 target/arm: Implement SG instruction corner cases
The common situation of the SG instruction is that it is
executed from S&NSC memory by a CPU in NS state. That case
is handled by v7m_handle_execute_nsc(). However the instruction
also has defined behaviour in a couple of other cases:
 * SG instruction in NS memory (behaves as a NOP)
 * SG in S memory but CPU already secure (clears IT bits and
   does nothing else)
 * SG instruction in v8M without Security Extension (NOP)

These can be implemented in translate.c.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 1507556919-24992-10-git-send-email-peter.maydell@linaro.org
2017-10-12 13:23:14 +01:00
..
Makefile.objs Move target-* CPU file into a target/ folder 2016-12-20 21:52:12 +01:00
arch_dump.c hmp: fix "dump-quest-memory" segfault (arm) 2017-09-14 15:52:10 +01:00
arm-powerctl.c target-arm/powerctl: defer cpu reset work to CPU context 2017-02-24 10:32:46 +00:00
arm-powerctl.h target-arm/powerctl: defer cpu reset work to CPU context 2017-02-24 10:32:46 +00:00
arm-semi.c Move target-* CPU file into a target/ folder 2016-12-20 21:52:12 +01:00
arm_ldst.h Fix Thumb-1 BE32 execution and disassembly. 2017-02-07 18:29:59 +00:00
cpu-qom.h Move target-* CPU file into a target/ folder 2016-12-20 21:52:12 +01:00
cpu.c qom/cpu: move cpu_model null check to cpu_class_by_name() 2017-10-09 23:21:52 -03:00
cpu.h target/arm: Factor out "get mmuidx for specified security state" 2017-10-06 16:46:49 +01:00
cpu64.c target-arm: Enable EL2 feature bit on A53 and A57 2017-01-20 11:15:10 +00:00
crypto_helper.c Move target-* CPU file into a target/ folder 2016-12-20 21:52:12 +01:00
gdbstub.c Move target-* CPU file into a target/ folder 2016-12-20 21:52:12 +01:00
gdbstub64.c Move target-* CPU file into a target/ folder 2016-12-20 21:52:12 +01:00
helper-a64.c target-arm: Use clrsb helper 2017-01-10 08:47:48 -08:00
helper-a64.h target-arm: Use clrsb helper 2017-01-10 08:47:48 -08:00
helper.c target/arm: Implement secure function return 2017-10-12 13:23:14 +01:00
helper.h target/arm: Implement BLXNS 2017-10-12 13:23:14 +01:00
internals.h target/arm: Implement secure function return 2017-10-12 13:23:14 +01:00
iwmmxt_helper.c Move target-* CPU file into a target/ folder 2016-12-20 21:52:12 +01:00
kvm-consts.h arm: add trailing ; after MISMATCH_CHECK 2017-02-01 03:37:18 +02:00
kvm-stub.c Move target-* CPU file into a target/ folder 2016-12-20 21:52:12 +01:00
kvm.c hw/arm/virt: allow pmu instantiation with userspace irqchip 2017-09-04 15:21:54 +01:00
kvm32.c target/arm/kvm: pmu: improve error handling 2017-09-04 15:21:54 +01:00
kvm64.c target/arm/kvm: pmu: improve error handling 2017-09-04 15:21:54 +01:00
kvm_arm.h target/arm/kvm: pmu: improve error handling 2017-09-04 15:21:54 +01:00
machine.c nvic: Implement Security Attribution Unit registers 2017-10-06 16:46:49 +01:00
monitor.c Move target-* CPU file into a target/ folder 2016-12-20 21:52:12 +01:00
neon_helper.c Move target-* CPU file into a target/ folder 2016-12-20 21:52:12 +01:00
op_addsub.h Move target-* CPU file into a target/ folder 2016-12-20 21:52:12 +01:00
op_helper.c arm: Fix SMC reporting to EL2 when QEMU provides PSCI 2017-10-06 16:46:47 +01:00
psci.c shutdown: Add source information to SHUTDOWN and RESET 2017-05-23 13:28:17 +02:00
trace-events trace-events: fix code style: print 0x before hex numbers 2017-08-01 12:13:07 +01:00
translate-a64.c tcg: remove addr argument from lookup_tb_ptr 2017-10-10 07:37:10 -07:00
translate.c target/arm: Implement SG instruction corner cases 2017-10-12 13:23:14 +01:00
translate.h target-arm: 2017-09-07 16:46:15 +01:00