qemu-e2k/hw
Peter Maydell cbb5638877 hw/arm: Model TCMs in the SSE-300, not the AN547
The SSE-300 has an ITCM at 0x0000_0000 and a DTCM at 0x2000_0000.
Currently we model these in the AN547 board, but this is conceptually
wrong, because they are a part of the SSE-300 itself. Move the
modelling of the TCMs out of mps2-tz.c into sse300.c.

This has no guest-visible effects.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20210510190844.17799-7-peter.maydell@linaro.org
2021-05-25 16:01:43 +01:00
..
9pfs
acpi
adc
alpha
arm hw/arm: Model TCMs in the SSE-300, not the AN547 2021-05-25 16:01:43 +01:00
audio
avr
block
char
core
cpu
cris
display
dma
gpio
hppa
hyperv
i2c
i386
ide
input
intc hw/intc/arm_gicv3_cpuif: Fix EOIR write access check logic 2021-05-25 16:01:43 +01:00
ipack
ipmi
isa
m68k
mem
microblaze
mips
misc
net
nios2
nubus
nvme
nvram
openrisc
pci
pci-bridge
pci-host
pcmcia
ppc
rdma
remote multi-process: Initialize variables declared with g_auto* 2021-05-21 15:43:57 +01:00
riscv
rtc
rx
s390x hw/s390x/ccw: Register qbus type in abstract TYPE_CCW_DEVICE parent 2021-05-20 14:19:30 +02:00
scsi
sd
sh4
smbios
sparc
sparc64
ssi
timer
tpm
tricore
usb
vfio vfio-ccw: Attempt to clean up all IRQs on error 2021-05-20 14:19:30 +02:00
virtio
watchdog
xen
xenpv
xtensa
Kconfig
meson.build