qemu-e2k/tcg/riscv
Richard Henderson 933b331b30 tcg/riscv: Support softmmu unaligned accesses
The system is required to emulate unaligned accesses, even if the
hardware does not support it.  The resulting trap may or may not
be more efficient than the qemu slow path.  There are linux kernel
patches in flight to allow userspace to query hardware support;
we can re-evaluate whether to enable this by default after that.

In the meantime, softmmu now matches useronly, where we already
assumed that unaligned accesses are supported.

Reviewed-by: LIU Zhiwei <zhiwei_liu@linux.alibaba.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2023-05-16 15:21:39 -07:00
..
tcg-target-con-set.h tcg/riscv: Simplify constraints on qemu_ld/st 2023-05-11 09:53:41 +01:00
tcg-target-con-str.h tcg/riscv: Simplify constraints on qemu_ld/st 2023-05-11 09:53:41 +01:00
tcg-target.c.inc tcg/riscv: Support softmmu unaligned accesses 2023-05-16 15:21:39 -07:00
tcg-target.h tcg/riscv: Require TCG_TARGET_REG_BITS == 64 2023-05-05 17:21:03 +01:00