qemu-e2k/tcg
Peter Maydell 528d9f33ca tcg/s390x improvements:
- drop support for pre-z196 cpus (eol before 2017)
  - add support for misc-instruction-extensions-3
  - misc cleanups
 -----BEGIN PGP SIGNATURE-----
 
 iQFRBAABCgA7FiEEekgeeIaLTbaoWgXAZN846K9+IV8FAmO5I68dHHJpY2hhcmQu
 aGVuZGVyc29uQGxpbmFyby5vcmcACgkQZN846K9+IV8qOAgAgfLyzz5yajzVD0TZ
 ufEw07Jlgw2th4Il4FZ3cKVaO9X1Sec9yTLaDXSByKJzTHQXso4Y7hBHciKjC8s4
 LatuVWJaUdYUHry39iDgjvKb+ZrQ1ajve1sDNrIrCj5ITqoGT23f1NxQSS+0MhPB
 cMVIEmiblPlynKDtOYBE9lcrkUFOBUqxqnV734AP1gOVyJOMjaVtm9T4wKIipC2M
 UOXKOo/YPYeygSUFZdrmjoaJE0qCyJbpQqVDGUPXN2Md7UADfVhIo9jrbnvmr7BR
 OfWDPuuVdt5g7P+TzLe0BXKPmbyqGi4vnjwPWNSl4ow+8xbxQ8fsSjpyx9kKd1i1
 swoGSQ==
 =gWI0
 -----END PGP SIGNATURE-----

Merge tag 'pull-tcg-20230106' of https://gitlab.com/rth7680/qemu into staging

tcg/s390x improvements:
 - drop support for pre-z196 cpus (eol before 2017)
 - add support for misc-instruction-extensions-3
 - misc cleanups

# gpg: Signature made Sat 07 Jan 2023 07:47:59 GMT
# gpg:                using RSA key 7A481E78868B4DB6A85A05C064DF38E8AF7E215F
# gpg:                issuer "richard.henderson@linaro.org"
# gpg: Good signature from "Richard Henderson <richard.henderson@linaro.org>" [full]
# Primary key fingerprint: 7A48 1E78 868B 4DB6 A85A  05C0 64DF 38E8 AF7E 215F

* tag 'pull-tcg-20230106' of https://gitlab.com/rth7680/qemu: (27 commits)
  tcg/s390x: Avoid the constant pool in tcg_out_movi
  tcg/s390x: Cleanup tcg_out_movi
  tcg/s390x: Tighten constraints for 64-bit compare
  tcg/s390x: Implement ctpop operation
  tcg/s390x: Use tgen_movcond_int in tgen_clz
  tcg/s390x: Support SELGR instruction in movcond
  tcg/s390x: Generalize movcond implementation
  tcg/s390x: Create tgen_cmp2 to simplify movcond
  tcg/s390x: Support MIE3 logical operations
  tcg/s390x: Tighten constraints for and_i64
  tcg/s390x: Tighten constraints for or_i64 and xor_i64
  tcg/s390x: Issue XILF directly for xor_i32
  tcg/s390x: Support MIE2 MGRK instruction
  tcg/s390x: Support MIE2 multiply single instructions
  tcg/s390x: Distinguish RIE formats
  tcg/s390x: Distinguish RRF-a and RRF-c formats
  tcg/s390x: Use LARL+AGHI for odd addresses
  tcg/s390x: Remove DISTINCT_OPERANDS facility check
  tcg/s390x: Remove FAST_BCR_SER facility check
  tcg/s390x: Check for load-on-condition facility at startup
  ...

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2023-01-08 11:23:17 +00:00
..
aarch64 tcg: Add TCGHelperInfo argument to tcg_out_call 2023-01-05 11:41:29 -08:00
arm tcg: Add TCGHelperInfo argument to tcg_out_call 2023-01-05 11:41:29 -08:00
i386 tcg: Add TCGHelperInfo argument to tcg_out_call 2023-01-05 11:41:29 -08:00
loongarch64 tcg: Add TCGHelperInfo argument to tcg_out_call 2023-01-05 11:41:29 -08:00
mips tcg: Add TCGHelperInfo argument to tcg_out_call 2023-01-05 11:41:29 -08:00
ppc tcg: Add TCGHelperInfo argument to tcg_out_call 2023-01-05 11:41:29 -08:00
riscv First RISC-V PR for QEMU 8.0 2023-01-06 22:15:53 +00:00
s390x tcg/s390x: Avoid the constant pool in tcg_out_movi 2023-01-06 23:07:10 +00:00
sparc64 tcg: Add TCGHelperInfo argument to tcg_out_call 2023-01-05 11:41:29 -08:00
tci tcg: Add TCGHelperInfo argument to tcg_out_call 2023-01-05 11:41:29 -08:00
meson.build
optimize.c tcg: Reorg function calls 2023-01-05 11:41:29 -08:00
region.c
tcg-common.c
tcg-internal.h tcg: Move ffi_cif pointer into TCGHelperInfo 2023-01-05 11:41:29 -08:00
tcg-ldst.c.inc
tcg-op-gvec.c
tcg-op-vec.c tcg: Pass number of arguments to tcg_emit_op() / tcg_op_insert_*() 2023-01-05 11:41:29 -08:00
tcg-op.c tcg: Pass number of arguments to tcg_emit_op() / tcg_op_insert_*() 2023-01-05 11:41:29 -08:00
tcg-pool.c.inc
tcg.c tcg: Add TCGHelperInfo argument to tcg_out_call 2023-01-05 11:41:29 -08:00
tci.c tci: MAX_OPC_PARAM_IARGS is no longer used 2023-01-04 16:20:01 -08:00