qemu-e2k/include/hw/riscv
Alistair Francis 71eb522c40
riscv/virt: Add the PFlash CFI01 device
Add the CFI01 PFlash to the RISC-V virt board. This is the same PFlash
from the ARM Virt board and the implementation is based on the ARM Virt
board. This allows users to specify flash files from the command line.

Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Signed-off-by: Palmer Dabbelt <palmer@sifive.com>
2019-10-28 07:47:28 -07:00
..
boot.h riscv: Add a helper routine for finding firmware 2019-09-17 08:42:43 -07:00
riscv_hart.h riscv: hart: Add a "hartid-base" property to RISC-V hart array 2019-09-17 08:42:47 -07:00
riscv_htif.h Clean up inclusion of sysemu/sysemu.h 2019-08-16 13:31:53 +02:00
sifive_clint.h include: Make headers more self-contained 2019-08-16 13:31:51 +02:00
sifive_cpu.h riscv: Add a sifive_cpu.h to include both E and U cpu type defines 2019-09-17 08:42:46 -07:00
sifive_e_prci.h riscv: sifive_e: prci: Update the PRCI register block size 2019-09-17 08:42:46 -07:00
sifive_e.h riscv: Add a sifive_cpu.h to include both E and U cpu type defines 2019-09-17 08:42:46 -07:00
sifive_gpio.h
sifive_plic.h riscv: plic: Remove unused interrupt functions 2019-09-17 08:42:42 -07:00
sifive_test.h riscv: sifive_test: Add reset functionality 2019-09-17 08:42:44 -07:00
sifive_u_otp.h riscv: sifive: Implement a model for SiFive FU540 OTP 2019-09-17 08:42:49 -07:00
sifive_u_prci.h riscv: sifive_u: Reference PRCI clocks in UART and ethernet nodes 2019-09-17 08:42:48 -07:00
sifive_u.h riscv/sifive_u: Add the start-in-flash property 2019-10-28 07:47:28 -07:00
sifive_uart.h include: Make headers more self-contained 2019-08-16 13:31:51 +02:00
spike.h riscv: hw: Drop "clock-frequency" property of cpu nodes 2019-10-28 07:47:27 -07:00
virt.h riscv/virt: Add the PFlash CFI01 device 2019-10-28 07:47:28 -07:00