Craig Janeczek 96992d1aa1 target/mips: Add emulation of MXU instructions S32I2M and S32M2I ... Add support for emulating the S32I2M and S32M2I MXU instructions. This commit also contains utility functions for reading/writing to MXU registers. This is required for overall MXU instruction support. Reviewed-by: Aleksandar Markovic <amarkovic@wavecomp.com> Signed-off-by: Craig Janeczek <jancraig@amazon.com> Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>		2018-10-29 14:13:53 +01:00
..
alpha	target/alpha: remove tlb_flush from alpha_cpu_initfn	2018-10-18 18:58:10 -07:00
arm	target/arm: Only flush tlb if ASID changes	2018-10-24 07:51:37 +01:00
cris	target/cris/translate: Get rid of qemu_log_separate()	2018-10-16 17:57:23 +02:00
hppa	target/hppa: Raise exception 26 on emulated hardware	2018-10-16 15:32:22 -07:00
i386	Error reporting patches for 2018-10-22	2018-10-23 17:20:23 +01:00
lm32
m68k
microblaze
mips	target/mips: Add emulation of MXU instructions S32I2M and S32M2I	2018-10-29 14:13:53 +01:00
moxie
nios2
openrisc
ppc	Error reporting patches for 2018-10-22	2018-10-23 17:20:23 +01:00
riscv	RISC-V: Update CSR and interrupt definitions	2018-10-17 13:02:19 -07:00
s390x	target/s390x: Check HAVE_ATOMIC128 and HAVE_CMPXCHG128 at translate	2018-10-18 19:46:53 -07:00
sh4
sparc
tilegx
tricore
unicore32	target/unicore32: remove tlb_flush from uc32_init_fn	2018-10-18 18:58:10 -07:00
xtensa