Anup Patel 9746e583fe hw/intc: Add RISC-V AIA IMSIC device emulation ... The RISC-V AIA (Advanced Interrupt Architecture) defines a new interrupt controller for MSIs (message signal interrupts) called IMSIC (Incoming Message Signal Interrupt Controller). The IMSIC is per-HART device and also suppport virtualizaiton of MSIs using dedicated VS-level guest interrupt files. This patch adds device emulation for RISC-V AIA IMSIC which supports M-level, S-level, and VS-level MSIs. Signed-off-by: Anup Patel <anup.patel@wdc.com> Signed-off-by: Anup Patel <anup@brainfault.org> Reviewed-by: Frank Chang <frank.chang@sifive.com> Message-Id: <20220220085526.808674-3-anup@brainfault.org> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>		2022-03-03 13:14:50 +10:00
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authz
block	hw/nvme: add support for zoned random write area	2022-02-14 08:58:29 +01:00
chardev
crypto
disas	target/riscv: setup everything for rv64 to support rv128 execution	2022-01-08 15:46:10 +10:00
exec	tcg: Remove dh_alias indirection for dh_typecode	2022-02-28 08:04:06 -10:00
fpu
hw	hw/intc: Add RISC-V AIA IMSIC device emulation	2022-03-03 13:14:50 +10:00
io
libdecnumber
migration
monitor
net	Revert "virtio-net: add support for configure interrupt"	2022-01-10 16:00:54 -05:00
qapi
qemu	include: Move hardware version declarations to new qemu/hw-version.h	2022-02-21 13:30:20 +00:00
qom
scsi
semihosting
standard-headers	linux-headers: Update headers to v5.17-rc1	2022-02-17 17:21:45 +00:00
sysemu	rtc: Move RTC function prototypes to their own header	2022-01-28 14:29:46 +00:00
tcg	tcg/tcg-op-gvec.c: Introduce tcg_gen_gvec_4i	2022-03-02 06:51:38 +01:00
ui	ui: avoid warnings about directdb on Alpine / musl libc	2022-01-18 16:42:41 +00:00
user
elf.h	elf: Add machine type value for LoongArch	2021-12-21 13:17:06 -08:00
glib-compat.h	docs/devel: more documentation on the use of suffixes	2022-01-18 16:42:42 +00:00
qemu-common.h	rtc: Move RTC function prototypes to their own header	2022-01-28 14:29:46 +00:00
qemu-io.h