f8eaef67a3
ACPI_PORT_SMI_CMD is alias for APM_CNT_IOPORT, so make it really one instead of duplicating its value. Signed-off-by: Igor Mammedov <imammedo@redhat.com> Reviewed-by: Eric Auger <eric.auger@redhat.com> Tested-by: Eric Auger <eric.auger@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
103 lines
2.7 KiB
C
103 lines
2.7 KiB
C
/*
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* QEMU PC APM controller Emulation
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* This is split out from acpi.c
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*
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* Copyright (c) 2006 Fabrice Bellard
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*
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* This library is free software; you can redistribute it and/or
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* modify it under the terms of the GNU Lesser General Public
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* License version 2 as published by the Free Software Foundation.
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*
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* This library is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* Lesser General Public License for more details.
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*
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* You should have received a copy of the GNU Lesser General Public
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* License along with this library; if not, see <http://www.gnu.org/licenses/>
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*
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* Contributions after 2012-01-13 are licensed under the terms of the
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* GNU GPL, version 2 or (at your option) any later version.
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*/
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#include "qemu/osdep.h"
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#include "hw/isa/apm.h"
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#include "hw/hw.h"
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#include "hw/pci/pci.h"
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//#define DEBUG
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#ifdef DEBUG
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# define APM_DPRINTF(format, ...) printf(format, ## __VA_ARGS__)
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#else
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# define APM_DPRINTF(format, ...) do { } while (0)
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#endif
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/* fixed I/O location */
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#define APM_STS_IOPORT 0xb3
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static void apm_ioport_writeb(void *opaque, hwaddr addr, uint64_t val,
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unsigned size)
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{
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APMState *apm = opaque;
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addr &= 1;
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APM_DPRINTF("apm_ioport_writeb addr=0x%" HWADDR_PRIx
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" val=0x%02" PRIx64 "\n", addr, val);
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if (addr == 0) {
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apm->apmc = val;
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if (apm->callback) {
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(apm->callback)(val, apm->arg);
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}
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} else {
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apm->apms = val;
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}
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}
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static uint64_t apm_ioport_readb(void *opaque, hwaddr addr, unsigned size)
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{
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APMState *apm = opaque;
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uint32_t val;
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addr &= 1;
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if (addr == 0) {
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val = apm->apmc;
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} else {
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val = apm->apms;
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}
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APM_DPRINTF("apm_ioport_readb addr=0x%" HWADDR_PRIx " val=0x%02x\n", addr, val);
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return val;
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}
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const VMStateDescription vmstate_apm = {
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.name = "APM State",
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.version_id = 1,
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.minimum_version_id = 1,
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.fields = (VMStateField[]) {
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VMSTATE_UINT8(apmc, APMState),
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VMSTATE_UINT8(apms, APMState),
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VMSTATE_END_OF_LIST()
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}
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};
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static const MemoryRegionOps apm_ops = {
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.read = apm_ioport_readb,
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.write = apm_ioport_writeb,
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.impl = {
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.min_access_size = 1,
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.max_access_size = 1,
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},
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};
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void apm_init(PCIDevice *dev, APMState *apm, apm_ctrl_changed_t callback,
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void *arg)
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{
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apm->callback = callback;
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apm->arg = arg;
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/* ioport 0xb2, 0xb3 */
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memory_region_init_io(&apm->io, OBJECT(dev), &apm_ops, apm, "apm-io", 2);
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memory_region_add_subregion(pci_address_space_io(dev), APM_CNT_IOPORT,
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&apm->io);
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}
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