97ce8d6155
Unimplemented registers in the cp15, CRn=0, opc1=0, CRm=0 space default to aliasing the MIDR register. Set all registers in the space to access MIDR by default. Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> Message-id: 6127846712b7ad2727354a4f5e1d809451f1e859.1373429432.git.peter.crosthwaite@xilinx.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org> |
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arm-semi.c | ||
cpu-qom.h | ||
cpu.c | ||
cpu.h | ||
helper.c | ||
helper.h | ||
iwmmxt_helper.c | ||
kvm_arm.h | ||
kvm-stub.c | ||
kvm.c | ||
machine.c | ||
Makefile.objs | ||
neon_helper.c | ||
op_addsub.h | ||
op_helper.c | ||
translate.c |