e9854c3945
Cc: Michael Walle <michael@walle.cc> Signed-off-by: Richard Henderson <rth@twiddle.net> Acked-by: Michael Walle <michael@walle.cc> Message-id: 1410626734-3804-21-git-send-email-rth@twiddle.net Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
93 lines
2.5 KiB
C
93 lines
2.5 KiB
C
/*
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* QEMU LatticeMico32 CPU
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*
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* Copyright (c) 2012 SUSE LINUX Products GmbH
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*
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* This library is free software; you can redistribute it and/or
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* modify it under the terms of the GNU Lesser General Public
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* License as published by the Free Software Foundation; either
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* version 2.1 of the License, or (at your option) any later version.
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*
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* This library is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* Lesser General Public License for more details.
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*
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* You should have received a copy of the GNU Lesser General Public
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* License along with this library; if not, see
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* <http://www.gnu.org/licenses/lgpl-2.1.html>
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*/
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#ifndef QEMU_LM32_CPU_QOM_H
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#define QEMU_LM32_CPU_QOM_H
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#include "qom/cpu.h"
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#include "cpu.h"
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#define TYPE_LM32_CPU "lm32-cpu"
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#define LM32_CPU_CLASS(klass) \
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OBJECT_CLASS_CHECK(LM32CPUClass, (klass), TYPE_LM32_CPU)
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#define LM32_CPU(obj) \
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OBJECT_CHECK(LM32CPU, (obj), TYPE_LM32_CPU)
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#define LM32_CPU_GET_CLASS(obj) \
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OBJECT_GET_CLASS(LM32CPUClass, (obj), TYPE_LM32_CPU)
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/**
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* LM32CPUClass:
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* @parent_realize: The parent class' realize handler.
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* @parent_reset: The parent class' reset handler.
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*
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* A LatticeMico32 CPU model.
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*/
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typedef struct LM32CPUClass {
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/*< private >*/
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CPUClass parent_class;
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/*< public >*/
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DeviceRealize parent_realize;
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void (*parent_reset)(CPUState *cpu);
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} LM32CPUClass;
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/**
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* LM32CPU:
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* @env: #CPULM32State
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*
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* A LatticeMico32 CPU.
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*/
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typedef struct LM32CPU {
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/*< private >*/
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CPUState parent_obj;
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/*< public >*/
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CPULM32State env;
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uint32_t revision;
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uint8_t num_interrupts;
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uint8_t num_breakpoints;
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uint8_t num_watchpoints;
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uint32_t features;
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} LM32CPU;
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static inline LM32CPU *lm32_env_get_cpu(CPULM32State *env)
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{
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return container_of(env, LM32CPU, env);
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}
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#define ENV_GET_CPU(e) CPU(lm32_env_get_cpu(e))
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#define ENV_OFFSET offsetof(LM32CPU, env)
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#ifndef CONFIG_USER_ONLY
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extern const struct VMStateDescription vmstate_lm32_cpu;
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#endif
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void lm32_cpu_do_interrupt(CPUState *cpu);
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bool lm32_cpu_exec_interrupt(CPUState *cs, int int_req);
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void lm32_cpu_dump_state(CPUState *cpu, FILE *f, fprintf_function cpu_fprintf,
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int flags);
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hwaddr lm32_cpu_get_phys_page_debug(CPUState *cpu, vaddr addr);
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int lm32_cpu_gdb_read_register(CPUState *cpu, uint8_t *buf, int reg);
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int lm32_cpu_gdb_write_register(CPUState *cpu, uint8_t *buf, int reg);
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#endif
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