qemu-e2k/target/riscv
Richard Henderson 04a37d4ca4 tcg: Make tb arg to synchronize_from_tb const
There is nothing within the translators that ought to be
changing the TranslationBlock data, so make it const.

This does not actually use the read-only copy of the
data structure that exists within the rx region.

Reviewed-by: Joelle van Dyne <j@getutm.app>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2021-01-07 05:09:41 -10:00
..
insn_trans target/riscv: Split the Hypervisor execute load helpers 2020-11-09 15:09:00 -08:00
cpu_bits.h target/riscv: csr: Remove compile time XLEN checks 2020-12-17 21:56:44 -08:00
cpu_helper.c target/riscv: cpu_helper: Remove compile time XLEN checks 2020-12-17 21:56:44 -08:00
cpu_user.h
cpu-param.h target/riscv: Add a virtualised MMU Mode 2020-11-09 15:08:45 -08:00
cpu.c tcg: Make tb arg to synchronize_from_tb const 2021-01-07 05:09:41 -10:00
cpu.h target/riscv: Add a riscv_cpu_is_32bit() helper function 2020-12-17 21:56:44 -08:00
csr.c target/riscv: csr: Remove compile time XLEN checks 2020-12-17 21:56:44 -08:00
fpu_helper.c target/riscv: fpu_helper: Match function defs in HELPER macros 2020-12-17 21:56:44 -08:00
gdbstub.c
helper.h target/riscv: fpu_helper: Match function defs in HELPER macros 2020-12-17 21:56:44 -08:00
insn16-32.decode
insn16-64.decode
insn16.decode
insn32-64.decode target/riscv: Allow generating hlv/hlvx/hsv instructions 2020-08-25 09:11:35 -07:00
insn32.decode target/riscv: Allow generating hlv/hlvx/hsv instructions 2020-08-25 09:11:35 -07:00
instmap.h
internals.h target/riscv: Add basic vmstate description of CPU 2020-11-03 07:17:23 -08:00
machine.c target/riscv: Add V extension state description 2020-11-03 07:17:23 -08:00
meson.build target/riscv: Add basic vmstate description of CPU 2020-11-03 07:17:23 -08:00
monitor.c hmp: Pass monitor to mon_get_cpu_env() 2020-11-13 12:45:51 +00:00
op_helper.c target/riscv: Split the Hypervisor execute load helpers 2020-11-09 15:09:00 -08:00
pmp.c target/riscv: Add PMP state description 2020-11-03 07:17:23 -08:00
pmp.h target/riscv: Add PMP state description 2020-11-03 07:17:23 -08:00
trace-events trace-events: Fix attribution of trace points to source 2020-09-09 17:17:58 +01:00
trace.h
translate.c target/riscv: Remove the hyp load and store functions 2020-11-09 15:08:57 -08:00
vector_helper.c softfloat: Implement the full set of comparisons for float16 2020-08-28 10:48:07 -07:00