9a5071abbc
Currently the trans functions for m-nocp.decode all live in translate-vfp.inc.c; move them out into their own translation unit, translate-m-nocp.c. The trans_* functions here are pure code motion with no changes. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20210430132740.10391-5-peter.maydell@linaro.org
60 lines
1.7 KiB
Meson
60 lines
1.7 KiB
Meson
gen = [
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decodetree.process('sve.decode', extra_args: '--decode=disas_sve'),
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decodetree.process('neon-shared.decode', extra_args: '--static-decode=disas_neon_shared'),
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decodetree.process('neon-dp.decode', extra_args: '--static-decode=disas_neon_dp'),
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decodetree.process('neon-ls.decode', extra_args: '--static-decode=disas_neon_ls'),
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decodetree.process('vfp.decode', extra_args: '--static-decode=disas_vfp'),
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decodetree.process('vfp-uncond.decode', extra_args: '--static-decode=disas_vfp_uncond'),
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decodetree.process('m-nocp.decode', extra_args: '--decode=disas_m_nocp'),
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decodetree.process('a32.decode', extra_args: '--static-decode=disas_a32'),
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decodetree.process('a32-uncond.decode', extra_args: '--static-decode=disas_a32_uncond'),
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decodetree.process('t32.decode', extra_args: '--static-decode=disas_t32'),
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decodetree.process('t16.decode', extra_args: ['-w', '16', '--static-decode=disas_t16']),
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]
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arm_ss = ss.source_set()
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arm_ss.add(gen)
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arm_ss.add(files(
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'cpu.c',
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'crypto_helper.c',
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'debug_helper.c',
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'gdbstub.c',
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'helper.c',
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'iwmmxt_helper.c',
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'm_helper.c',
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'neon_helper.c',
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'op_helper.c',
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'tlb_helper.c',
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'translate.c',
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'translate-m-nocp.c',
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'vec_helper.c',
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'vfp_helper.c',
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'cpu_tcg.c',
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))
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arm_ss.add(zlib)
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arm_ss.add(when: 'CONFIG_KVM', if_true: files('kvm.c', 'kvm64.c'), if_false: files('kvm-stub.c'))
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arm_ss.add(when: 'TARGET_AARCH64', if_true: files(
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'cpu64.c',
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'gdbstub64.c',
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'helper-a64.c',
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'mte_helper.c',
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'pauth_helper.c',
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'sve_helper.c',
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'translate-a64.c',
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'translate-sve.c',
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))
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arm_softmmu_ss = ss.source_set()
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arm_softmmu_ss.add(files(
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'arch_dump.c',
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'arm-powerctl.c',
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'machine.c',
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'monitor.c',
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'psci.c',
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))
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target_arch += {'arm': arm_ss}
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target_softmmu_arch += {'arm': arm_softmmu_ss}
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