Cédric Le Goater f286f04c21 aspeed/smc: Add AST2600 timings registers ... Each CS has its own Read Timing Compensation Register on newer SoCs. Signed-off-by: Cédric Le Goater <clg@kaod.org> Reviewed-by: Joel Stanley <joel@jms.id.au> Signed-off-by: Cédric Le Goater <clg@kaod.org> Message-id: 20191119141211.25716-13-clg@kaod.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>		2019-12-16 10:46:34 +00:00
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aspeed_smc.h	aspeed/smc: Add AST2600 timings registers	2019-12-16 10:46:34 +00:00
imx_spi.h
mss-spi.h
pl022.h
ssi.h	Include hw/qdev-properties.h less	2019-08-16 13:31:53 +02:00
stm32f2xx_spi.h	Include hw/hw.h exactly where needed	2019-08-16 13:31:52 +02:00
xilinx_spips.h