9197c7bdde
We should use printf format specifier "%u" instead of "%d" for argument of type "unsigned int". Reported-by: Euler Robot <euler.robot@huawei.com> Signed-off-by: Alex Chen <alex.chen@huawei.com> Message-id: 20201126111109.112238-4-alex.chen@huawei.com Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
784 lines
22 KiB
C
784 lines
22 KiB
C
/*
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* IMX6 Clock Control Module
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*
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* Copyright (c) 2015 Jean-Christophe Dubois <jcd@tribudubois.net>
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*
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* This work is licensed under the terms of the GNU GPL, version 2 or later.
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* See the COPYING file in the top-level directory.
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*
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* To get the timer frequencies right, we need to emulate at least part of
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* the CCM.
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*/
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#include "qemu/osdep.h"
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#include "hw/misc/imx6_ccm.h"
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#include "migration/vmstate.h"
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#include "qemu/log.h"
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#include "qemu/module.h"
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#ifndef DEBUG_IMX6_CCM
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#define DEBUG_IMX6_CCM 0
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#endif
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#define DPRINTF(fmt, args...) \
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do { \
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if (DEBUG_IMX6_CCM) { \
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fprintf(stderr, "[%s]%s: " fmt , TYPE_IMX6_CCM, \
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__func__, ##args); \
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} \
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} while (0)
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static const char *imx6_ccm_reg_name(uint32_t reg)
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{
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static char unknown[20];
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switch (reg) {
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case CCM_CCR:
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return "CCR";
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case CCM_CCDR:
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return "CCDR";
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case CCM_CSR:
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return "CSR";
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case CCM_CCSR:
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return "CCSR";
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case CCM_CACRR:
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return "CACRR";
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case CCM_CBCDR:
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return "CBCDR";
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case CCM_CBCMR:
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return "CBCMR";
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case CCM_CSCMR1:
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return "CSCMR1";
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case CCM_CSCMR2:
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return "CSCMR2";
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case CCM_CSCDR1:
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return "CSCDR1";
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case CCM_CS1CDR:
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return "CS1CDR";
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case CCM_CS2CDR:
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return "CS2CDR";
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case CCM_CDCDR:
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return "CDCDR";
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case CCM_CHSCCDR:
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return "CHSCCDR";
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case CCM_CSCDR2:
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return "CSCDR2";
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case CCM_CSCDR3:
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return "CSCDR3";
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case CCM_CDHIPR:
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return "CDHIPR";
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case CCM_CTOR:
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return "CTOR";
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case CCM_CLPCR:
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return "CLPCR";
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case CCM_CISR:
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return "CISR";
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case CCM_CIMR:
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return "CIMR";
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case CCM_CCOSR:
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return "CCOSR";
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case CCM_CGPR:
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return "CGPR";
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case CCM_CCGR0:
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return "CCGR0";
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case CCM_CCGR1:
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return "CCGR1";
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case CCM_CCGR2:
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return "CCGR2";
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case CCM_CCGR3:
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return "CCGR3";
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case CCM_CCGR4:
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return "CCGR4";
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case CCM_CCGR5:
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return "CCGR5";
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case CCM_CCGR6:
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return "CCGR6";
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case CCM_CMEOR:
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return "CMEOR";
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default:
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sprintf(unknown, "%u ?", reg);
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return unknown;
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}
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}
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static const char *imx6_analog_reg_name(uint32_t reg)
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{
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static char unknown[20];
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switch (reg) {
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case CCM_ANALOG_PLL_ARM:
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return "PLL_ARM";
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case CCM_ANALOG_PLL_ARM_SET:
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return "PLL_ARM_SET";
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case CCM_ANALOG_PLL_ARM_CLR:
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return "PLL_ARM_CLR";
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case CCM_ANALOG_PLL_ARM_TOG:
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return "PLL_ARM_TOG";
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case CCM_ANALOG_PLL_USB1:
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return "PLL_USB1";
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case CCM_ANALOG_PLL_USB1_SET:
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return "PLL_USB1_SET";
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case CCM_ANALOG_PLL_USB1_CLR:
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return "PLL_USB1_CLR";
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case CCM_ANALOG_PLL_USB1_TOG:
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return "PLL_USB1_TOG";
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case CCM_ANALOG_PLL_USB2:
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return "PLL_USB2";
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case CCM_ANALOG_PLL_USB2_SET:
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return "PLL_USB2_SET";
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case CCM_ANALOG_PLL_USB2_CLR:
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return "PLL_USB2_CLR";
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case CCM_ANALOG_PLL_USB2_TOG:
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return "PLL_USB2_TOG";
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case CCM_ANALOG_PLL_SYS:
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return "PLL_SYS";
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case CCM_ANALOG_PLL_SYS_SET:
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return "PLL_SYS_SET";
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case CCM_ANALOG_PLL_SYS_CLR:
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return "PLL_SYS_CLR";
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case CCM_ANALOG_PLL_SYS_TOG:
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return "PLL_SYS_TOG";
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case CCM_ANALOG_PLL_SYS_SS:
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return "PLL_SYS_SS";
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case CCM_ANALOG_PLL_SYS_NUM:
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return "PLL_SYS_NUM";
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case CCM_ANALOG_PLL_SYS_DENOM:
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return "PLL_SYS_DENOM";
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case CCM_ANALOG_PLL_AUDIO:
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return "PLL_AUDIO";
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case CCM_ANALOG_PLL_AUDIO_SET:
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return "PLL_AUDIO_SET";
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case CCM_ANALOG_PLL_AUDIO_CLR:
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return "PLL_AUDIO_CLR";
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case CCM_ANALOG_PLL_AUDIO_TOG:
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return "PLL_AUDIO_TOG";
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case CCM_ANALOG_PLL_AUDIO_NUM:
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return "PLL_AUDIO_NUM";
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case CCM_ANALOG_PLL_AUDIO_DENOM:
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return "PLL_AUDIO_DENOM";
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case CCM_ANALOG_PLL_VIDEO:
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return "PLL_VIDEO";
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case CCM_ANALOG_PLL_VIDEO_SET:
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return "PLL_VIDEO_SET";
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case CCM_ANALOG_PLL_VIDEO_CLR:
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return "PLL_VIDEO_CLR";
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case CCM_ANALOG_PLL_VIDEO_TOG:
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return "PLL_VIDEO_TOG";
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case CCM_ANALOG_PLL_VIDEO_NUM:
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return "PLL_VIDEO_NUM";
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case CCM_ANALOG_PLL_VIDEO_DENOM:
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return "PLL_VIDEO_DENOM";
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case CCM_ANALOG_PLL_MLB:
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return "PLL_MLB";
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case CCM_ANALOG_PLL_MLB_SET:
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return "PLL_MLB_SET";
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case CCM_ANALOG_PLL_MLB_CLR:
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return "PLL_MLB_CLR";
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case CCM_ANALOG_PLL_MLB_TOG:
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return "PLL_MLB_TOG";
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case CCM_ANALOG_PLL_ENET:
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return "PLL_ENET";
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case CCM_ANALOG_PLL_ENET_SET:
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return "PLL_ENET_SET";
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case CCM_ANALOG_PLL_ENET_CLR:
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return "PLL_ENET_CLR";
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case CCM_ANALOG_PLL_ENET_TOG:
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return "PLL_ENET_TOG";
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case CCM_ANALOG_PFD_480:
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return "PFD_480";
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case CCM_ANALOG_PFD_480_SET:
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return "PFD_480_SET";
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case CCM_ANALOG_PFD_480_CLR:
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return "PFD_480_CLR";
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case CCM_ANALOG_PFD_480_TOG:
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return "PFD_480_TOG";
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case CCM_ANALOG_PFD_528:
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return "PFD_528";
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case CCM_ANALOG_PFD_528_SET:
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return "PFD_528_SET";
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case CCM_ANALOG_PFD_528_CLR:
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return "PFD_528_CLR";
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case CCM_ANALOG_PFD_528_TOG:
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return "PFD_528_TOG";
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case CCM_ANALOG_MISC0:
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return "MISC0";
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case CCM_ANALOG_MISC0_SET:
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return "MISC0_SET";
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case CCM_ANALOG_MISC0_CLR:
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return "MISC0_CLR";
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case CCM_ANALOG_MISC0_TOG:
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return "MISC0_TOG";
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case CCM_ANALOG_MISC2:
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return "MISC2";
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case CCM_ANALOG_MISC2_SET:
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return "MISC2_SET";
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case CCM_ANALOG_MISC2_CLR:
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return "MISC2_CLR";
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case CCM_ANALOG_MISC2_TOG:
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return "MISC2_TOG";
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case PMU_REG_1P1:
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return "PMU_REG_1P1";
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case PMU_REG_3P0:
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return "PMU_REG_3P0";
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case PMU_REG_2P5:
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return "PMU_REG_2P5";
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case PMU_REG_CORE:
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return "PMU_REG_CORE";
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case PMU_MISC1:
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return "PMU_MISC1";
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case PMU_MISC1_SET:
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return "PMU_MISC1_SET";
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case PMU_MISC1_CLR:
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return "PMU_MISC1_CLR";
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case PMU_MISC1_TOG:
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return "PMU_MISC1_TOG";
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case USB_ANALOG_DIGPROG:
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return "USB_ANALOG_DIGPROG";
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default:
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sprintf(unknown, "%u ?", reg);
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return unknown;
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}
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}
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#define CKIH_FREQ 24000000 /* 24MHz crystal input */
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static const VMStateDescription vmstate_imx6_ccm = {
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.name = TYPE_IMX6_CCM,
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.version_id = 1,
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.minimum_version_id = 1,
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.fields = (VMStateField[]) {
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VMSTATE_UINT32_ARRAY(ccm, IMX6CCMState, CCM_MAX),
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VMSTATE_UINT32_ARRAY(analog, IMX6CCMState, CCM_ANALOG_MAX),
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VMSTATE_END_OF_LIST()
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},
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};
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static uint64_t imx6_analog_get_pll2_clk(IMX6CCMState *dev)
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{
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uint64_t freq = 24000000;
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if (EXTRACT(dev->analog[CCM_ANALOG_PLL_SYS], DIV_SELECT)) {
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freq *= 22;
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} else {
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freq *= 20;
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}
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DPRINTF("freq = %u\n", (uint32_t)freq);
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return freq;
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}
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static uint64_t imx6_analog_get_pll2_pfd0_clk(IMX6CCMState *dev)
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{
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uint64_t freq = 0;
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freq = imx6_analog_get_pll2_clk(dev) * 18
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/ EXTRACT(dev->analog[CCM_ANALOG_PFD_528], PFD0_FRAC);
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DPRINTF("freq = %u\n", (uint32_t)freq);
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return freq;
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}
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static uint64_t imx6_analog_get_pll2_pfd2_clk(IMX6CCMState *dev)
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{
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uint64_t freq = 0;
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freq = imx6_analog_get_pll2_clk(dev) * 18
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/ EXTRACT(dev->analog[CCM_ANALOG_PFD_528], PFD2_FRAC);
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DPRINTF("freq = %u\n", (uint32_t)freq);
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return freq;
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}
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static uint64_t imx6_analog_get_periph_clk(IMX6CCMState *dev)
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{
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uint64_t freq = 0;
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switch (EXTRACT(dev->ccm[CCM_CBCMR], PRE_PERIPH_CLK_SEL)) {
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case 0:
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freq = imx6_analog_get_pll2_clk(dev);
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break;
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case 1:
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freq = imx6_analog_get_pll2_pfd2_clk(dev);
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break;
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case 2:
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freq = imx6_analog_get_pll2_pfd0_clk(dev);
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break;
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case 3:
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freq = imx6_analog_get_pll2_pfd2_clk(dev) / 2;
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break;
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default:
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/* We should never get there */
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g_assert_not_reached();
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break;
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}
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DPRINTF("freq = %u\n", (uint32_t)freq);
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return freq;
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}
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static uint64_t imx6_ccm_get_ahb_clk(IMX6CCMState *dev)
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{
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uint64_t freq = 0;
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freq = imx6_analog_get_periph_clk(dev)
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/ (1 + EXTRACT(dev->ccm[CCM_CBCDR], AHB_PODF));
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DPRINTF("freq = %u\n", (uint32_t)freq);
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return freq;
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}
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static uint64_t imx6_ccm_get_ipg_clk(IMX6CCMState *dev)
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{
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uint64_t freq = 0;
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freq = imx6_ccm_get_ahb_clk(dev)
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/ (1 + EXTRACT(dev->ccm[CCM_CBCDR], IPG_PODF));
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DPRINTF("freq = %u\n", (uint32_t)freq);
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return freq;
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}
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static uint64_t imx6_ccm_get_per_clk(IMX6CCMState *dev)
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{
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uint64_t freq = 0;
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freq = imx6_ccm_get_ipg_clk(dev)
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/ (1 + EXTRACT(dev->ccm[CCM_CSCMR1], PERCLK_PODF));
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DPRINTF("freq = %u\n", (uint32_t)freq);
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return freq;
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}
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static uint32_t imx6_ccm_get_clock_frequency(IMXCCMState *dev, IMXClk clock)
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{
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uint32_t freq = 0;
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IMX6CCMState *s = IMX6_CCM(dev);
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switch (clock) {
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case CLK_NONE:
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break;
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case CLK_IPG:
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freq = imx6_ccm_get_ipg_clk(s);
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break;
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case CLK_IPG_HIGH:
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freq = imx6_ccm_get_per_clk(s);
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break;
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case CLK_32k:
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freq = CKIL_FREQ;
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break;
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case CLK_HIGH:
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freq = 24000000;
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break;
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case CLK_HIGH_DIV:
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freq = 24000000 / 8;
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break;
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default:
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qemu_log_mask(LOG_GUEST_ERROR, "[%s]%s: unsupported clock %d\n",
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TYPE_IMX6_CCM, __func__, clock);
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break;
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}
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DPRINTF("Clock = %d) = %u\n", clock, freq);
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return freq;
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}
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static void imx6_ccm_reset(DeviceState *dev)
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{
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IMX6CCMState *s = IMX6_CCM(dev);
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DPRINTF("\n");
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s->ccm[CCM_CCR] = 0x040116FF;
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s->ccm[CCM_CCDR] = 0x00000000;
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s->ccm[CCM_CSR] = 0x00000010;
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s->ccm[CCM_CCSR] = 0x00000100;
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s->ccm[CCM_CACRR] = 0x00000000;
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s->ccm[CCM_CBCDR] = 0x00018D40;
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s->ccm[CCM_CBCMR] = 0x00022324;
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s->ccm[CCM_CSCMR1] = 0x00F00000;
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s->ccm[CCM_CSCMR2] = 0x02B92F06;
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s->ccm[CCM_CSCDR1] = 0x00490B00;
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s->ccm[CCM_CS1CDR] = 0x0EC102C1;
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s->ccm[CCM_CS2CDR] = 0x000736C1;
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s->ccm[CCM_CDCDR] = 0x33F71F92;
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s->ccm[CCM_CHSCCDR] = 0x0002A150;
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s->ccm[CCM_CSCDR2] = 0x0002A150;
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s->ccm[CCM_CSCDR3] = 0x00014841;
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s->ccm[CCM_CDHIPR] = 0x00000000;
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s->ccm[CCM_CTOR] = 0x00000000;
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s->ccm[CCM_CLPCR] = 0x00000079;
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s->ccm[CCM_CISR] = 0x00000000;
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s->ccm[CCM_CIMR] = 0xFFFFFFFF;
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s->ccm[CCM_CCOSR] = 0x000A0001;
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s->ccm[CCM_CGPR] = 0x0000FE62;
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s->ccm[CCM_CCGR0] = 0xFFFFFFFF;
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s->ccm[CCM_CCGR1] = 0xFFFFFFFF;
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s->ccm[CCM_CCGR2] = 0xFC3FFFFF;
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s->ccm[CCM_CCGR3] = 0xFFFFFFFF;
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s->ccm[CCM_CCGR4] = 0xFFFFFFFF;
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s->ccm[CCM_CCGR5] = 0xFFFFFFFF;
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s->ccm[CCM_CCGR6] = 0xFFFFFFFF;
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s->ccm[CCM_CMEOR] = 0xFFFFFFFF;
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s->analog[CCM_ANALOG_PLL_ARM] = 0x00013042;
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s->analog[CCM_ANALOG_PLL_USB1] = 0x00012000;
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s->analog[CCM_ANALOG_PLL_USB2] = 0x00012000;
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s->analog[CCM_ANALOG_PLL_SYS] = 0x00013001;
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s->analog[CCM_ANALOG_PLL_SYS_SS] = 0x00000000;
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s->analog[CCM_ANALOG_PLL_SYS_NUM] = 0x00000000;
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s->analog[CCM_ANALOG_PLL_SYS_DENOM] = 0x00000012;
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s->analog[CCM_ANALOG_PLL_AUDIO] = 0x00011006;
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s->analog[CCM_ANALOG_PLL_AUDIO_NUM] = 0x05F5E100;
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s->analog[CCM_ANALOG_PLL_AUDIO_DENOM] = 0x2964619C;
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s->analog[CCM_ANALOG_PLL_VIDEO] = 0x0001100C;
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s->analog[CCM_ANALOG_PLL_VIDEO_NUM] = 0x05F5E100;
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s->analog[CCM_ANALOG_PLL_VIDEO_DENOM] = 0x10A24447;
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s->analog[CCM_ANALOG_PLL_MLB] = 0x00010000;
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s->analog[CCM_ANALOG_PLL_ENET] = 0x00011001;
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s->analog[CCM_ANALOG_PFD_480] = 0x1311100C;
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s->analog[CCM_ANALOG_PFD_528] = 0x1018101B;
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s->analog[PMU_REG_1P1] = 0x00001073;
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s->analog[PMU_REG_3P0] = 0x00000F74;
|
|
s->analog[PMU_REG_2P5] = 0x00005071;
|
|
s->analog[PMU_REG_CORE] = 0x00402010;
|
|
s->analog[PMU_MISC0] = 0x04000000;
|
|
s->analog[PMU_MISC1] = 0x00000000;
|
|
s->analog[PMU_MISC2] = 0x00272727;
|
|
|
|
s->analog[USB_ANALOG_USB1_VBUS_DETECT] = 0x00000004;
|
|
s->analog[USB_ANALOG_USB1_CHRG_DETECT] = 0x00000000;
|
|
s->analog[USB_ANALOG_USB1_VBUS_DETECT_STAT] = 0x00000000;
|
|
s->analog[USB_ANALOG_USB1_CHRG_DETECT_STAT] = 0x00000000;
|
|
s->analog[USB_ANALOG_USB1_MISC] = 0x00000002;
|
|
s->analog[USB_ANALOG_USB2_VBUS_DETECT] = 0x00000004;
|
|
s->analog[USB_ANALOG_USB2_CHRG_DETECT] = 0x00000000;
|
|
s->analog[USB_ANALOG_USB2_MISC] = 0x00000002;
|
|
s->analog[USB_ANALOG_DIGPROG] = 0x00000000;
|
|
|
|
/* all PLLs need to be locked */
|
|
s->analog[CCM_ANALOG_PLL_ARM] |= CCM_ANALOG_PLL_LOCK;
|
|
s->analog[CCM_ANALOG_PLL_USB1] |= CCM_ANALOG_PLL_LOCK;
|
|
s->analog[CCM_ANALOG_PLL_USB2] |= CCM_ANALOG_PLL_LOCK;
|
|
s->analog[CCM_ANALOG_PLL_SYS] |= CCM_ANALOG_PLL_LOCK;
|
|
s->analog[CCM_ANALOG_PLL_AUDIO] |= CCM_ANALOG_PLL_LOCK;
|
|
s->analog[CCM_ANALOG_PLL_VIDEO] |= CCM_ANALOG_PLL_LOCK;
|
|
s->analog[CCM_ANALOG_PLL_MLB] |= CCM_ANALOG_PLL_LOCK;
|
|
s->analog[CCM_ANALOG_PLL_ENET] |= CCM_ANALOG_PLL_LOCK;
|
|
}
|
|
|
|
static uint64_t imx6_ccm_read(void *opaque, hwaddr offset, unsigned size)
|
|
{
|
|
uint32_t value = 0;
|
|
uint32_t index = offset >> 2;
|
|
IMX6CCMState *s = (IMX6CCMState *)opaque;
|
|
|
|
value = s->ccm[index];
|
|
|
|
DPRINTF("reg[%s] => 0x%" PRIx32 "\n", imx6_ccm_reg_name(index), value);
|
|
|
|
return (uint64_t)value;
|
|
}
|
|
|
|
static void imx6_ccm_write(void *opaque, hwaddr offset, uint64_t value,
|
|
unsigned size)
|
|
{
|
|
uint32_t index = offset >> 2;
|
|
IMX6CCMState *s = (IMX6CCMState *)opaque;
|
|
|
|
DPRINTF("reg[%s] <= 0x%" PRIx32 "\n", imx6_ccm_reg_name(index),
|
|
(uint32_t)value);
|
|
|
|
/*
|
|
* We will do a better implementation later. In particular some bits
|
|
* cannot be written to.
|
|
*/
|
|
s->ccm[index] = (uint32_t)value;
|
|
}
|
|
|
|
static uint64_t imx6_analog_read(void *opaque, hwaddr offset, unsigned size)
|
|
{
|
|
uint32_t value;
|
|
uint32_t index = offset >> 2;
|
|
IMX6CCMState *s = (IMX6CCMState *)opaque;
|
|
|
|
switch (index) {
|
|
case CCM_ANALOG_PLL_ARM_SET:
|
|
case CCM_ANALOG_PLL_USB1_SET:
|
|
case CCM_ANALOG_PLL_USB2_SET:
|
|
case CCM_ANALOG_PLL_SYS_SET:
|
|
case CCM_ANALOG_PLL_AUDIO_SET:
|
|
case CCM_ANALOG_PLL_VIDEO_SET:
|
|
case CCM_ANALOG_PLL_MLB_SET:
|
|
case CCM_ANALOG_PLL_ENET_SET:
|
|
case CCM_ANALOG_PFD_480_SET:
|
|
case CCM_ANALOG_PFD_528_SET:
|
|
case CCM_ANALOG_MISC0_SET:
|
|
case PMU_MISC1_SET:
|
|
case CCM_ANALOG_MISC2_SET:
|
|
case USB_ANALOG_USB1_VBUS_DETECT_SET:
|
|
case USB_ANALOG_USB1_CHRG_DETECT_SET:
|
|
case USB_ANALOG_USB1_MISC_SET:
|
|
case USB_ANALOG_USB2_VBUS_DETECT_SET:
|
|
case USB_ANALOG_USB2_CHRG_DETECT_SET:
|
|
case USB_ANALOG_USB2_MISC_SET:
|
|
/*
|
|
* All REG_NAME_SET register access are in fact targeting the
|
|
* the REG_NAME register.
|
|
*/
|
|
value = s->analog[index - 1];
|
|
break;
|
|
case CCM_ANALOG_PLL_ARM_CLR:
|
|
case CCM_ANALOG_PLL_USB1_CLR:
|
|
case CCM_ANALOG_PLL_USB2_CLR:
|
|
case CCM_ANALOG_PLL_SYS_CLR:
|
|
case CCM_ANALOG_PLL_AUDIO_CLR:
|
|
case CCM_ANALOG_PLL_VIDEO_CLR:
|
|
case CCM_ANALOG_PLL_MLB_CLR:
|
|
case CCM_ANALOG_PLL_ENET_CLR:
|
|
case CCM_ANALOG_PFD_480_CLR:
|
|
case CCM_ANALOG_PFD_528_CLR:
|
|
case CCM_ANALOG_MISC0_CLR:
|
|
case PMU_MISC1_CLR:
|
|
case CCM_ANALOG_MISC2_CLR:
|
|
case USB_ANALOG_USB1_VBUS_DETECT_CLR:
|
|
case USB_ANALOG_USB1_CHRG_DETECT_CLR:
|
|
case USB_ANALOG_USB1_MISC_CLR:
|
|
case USB_ANALOG_USB2_VBUS_DETECT_CLR:
|
|
case USB_ANALOG_USB2_CHRG_DETECT_CLR:
|
|
case USB_ANALOG_USB2_MISC_CLR:
|
|
/*
|
|
* All REG_NAME_CLR register access are in fact targeting the
|
|
* the REG_NAME register.
|
|
*/
|
|
value = s->analog[index - 2];
|
|
break;
|
|
case CCM_ANALOG_PLL_ARM_TOG:
|
|
case CCM_ANALOG_PLL_USB1_TOG:
|
|
case CCM_ANALOG_PLL_USB2_TOG:
|
|
case CCM_ANALOG_PLL_SYS_TOG:
|
|
case CCM_ANALOG_PLL_AUDIO_TOG:
|
|
case CCM_ANALOG_PLL_VIDEO_TOG:
|
|
case CCM_ANALOG_PLL_MLB_TOG:
|
|
case CCM_ANALOG_PLL_ENET_TOG:
|
|
case CCM_ANALOG_PFD_480_TOG:
|
|
case CCM_ANALOG_PFD_528_TOG:
|
|
case CCM_ANALOG_MISC0_TOG:
|
|
case PMU_MISC1_TOG:
|
|
case CCM_ANALOG_MISC2_TOG:
|
|
case USB_ANALOG_USB1_VBUS_DETECT_TOG:
|
|
case USB_ANALOG_USB1_CHRG_DETECT_TOG:
|
|
case USB_ANALOG_USB1_MISC_TOG:
|
|
case USB_ANALOG_USB2_VBUS_DETECT_TOG:
|
|
case USB_ANALOG_USB2_CHRG_DETECT_TOG:
|
|
case USB_ANALOG_USB2_MISC_TOG:
|
|
/*
|
|
* All REG_NAME_TOG register access are in fact targeting the
|
|
* the REG_NAME register.
|
|
*/
|
|
value = s->analog[index - 3];
|
|
break;
|
|
default:
|
|
value = s->analog[index];
|
|
break;
|
|
}
|
|
|
|
DPRINTF("reg[%s] => 0x%" PRIx32 "\n", imx6_analog_reg_name(index), value);
|
|
|
|
return (uint64_t)value;
|
|
}
|
|
|
|
static void imx6_analog_write(void *opaque, hwaddr offset, uint64_t value,
|
|
unsigned size)
|
|
{
|
|
uint32_t index = offset >> 2;
|
|
IMX6CCMState *s = (IMX6CCMState *)opaque;
|
|
|
|
DPRINTF("reg[%s] <= 0x%" PRIx32 "\n", imx6_analog_reg_name(index),
|
|
(uint32_t)value);
|
|
|
|
switch (index) {
|
|
case CCM_ANALOG_PLL_ARM_SET:
|
|
case CCM_ANALOG_PLL_USB1_SET:
|
|
case CCM_ANALOG_PLL_USB2_SET:
|
|
case CCM_ANALOG_PLL_SYS_SET:
|
|
case CCM_ANALOG_PLL_AUDIO_SET:
|
|
case CCM_ANALOG_PLL_VIDEO_SET:
|
|
case CCM_ANALOG_PLL_MLB_SET:
|
|
case CCM_ANALOG_PLL_ENET_SET:
|
|
case CCM_ANALOG_PFD_480_SET:
|
|
case CCM_ANALOG_PFD_528_SET:
|
|
case CCM_ANALOG_MISC0_SET:
|
|
case PMU_MISC1_SET:
|
|
case CCM_ANALOG_MISC2_SET:
|
|
case USB_ANALOG_USB1_VBUS_DETECT_SET:
|
|
case USB_ANALOG_USB1_CHRG_DETECT_SET:
|
|
case USB_ANALOG_USB1_MISC_SET:
|
|
case USB_ANALOG_USB2_VBUS_DETECT_SET:
|
|
case USB_ANALOG_USB2_CHRG_DETECT_SET:
|
|
case USB_ANALOG_USB2_MISC_SET:
|
|
/*
|
|
* All REG_NAME_SET register access are in fact targeting the
|
|
* the REG_NAME register. So we change the value of the
|
|
* REG_NAME register, setting bits passed in the value.
|
|
*/
|
|
s->analog[index - 1] |= value;
|
|
break;
|
|
case CCM_ANALOG_PLL_ARM_CLR:
|
|
case CCM_ANALOG_PLL_USB1_CLR:
|
|
case CCM_ANALOG_PLL_USB2_CLR:
|
|
case CCM_ANALOG_PLL_SYS_CLR:
|
|
case CCM_ANALOG_PLL_AUDIO_CLR:
|
|
case CCM_ANALOG_PLL_VIDEO_CLR:
|
|
case CCM_ANALOG_PLL_MLB_CLR:
|
|
case CCM_ANALOG_PLL_ENET_CLR:
|
|
case CCM_ANALOG_PFD_480_CLR:
|
|
case CCM_ANALOG_PFD_528_CLR:
|
|
case CCM_ANALOG_MISC0_CLR:
|
|
case PMU_MISC1_CLR:
|
|
case CCM_ANALOG_MISC2_CLR:
|
|
case USB_ANALOG_USB1_VBUS_DETECT_CLR:
|
|
case USB_ANALOG_USB1_CHRG_DETECT_CLR:
|
|
case USB_ANALOG_USB1_MISC_CLR:
|
|
case USB_ANALOG_USB2_VBUS_DETECT_CLR:
|
|
case USB_ANALOG_USB2_CHRG_DETECT_CLR:
|
|
case USB_ANALOG_USB2_MISC_CLR:
|
|
/*
|
|
* All REG_NAME_CLR register access are in fact targeting the
|
|
* the REG_NAME register. So we change the value of the
|
|
* REG_NAME register, unsetting bits passed in the value.
|
|
*/
|
|
s->analog[index - 2] &= ~value;
|
|
break;
|
|
case CCM_ANALOG_PLL_ARM_TOG:
|
|
case CCM_ANALOG_PLL_USB1_TOG:
|
|
case CCM_ANALOG_PLL_USB2_TOG:
|
|
case CCM_ANALOG_PLL_SYS_TOG:
|
|
case CCM_ANALOG_PLL_AUDIO_TOG:
|
|
case CCM_ANALOG_PLL_VIDEO_TOG:
|
|
case CCM_ANALOG_PLL_MLB_TOG:
|
|
case CCM_ANALOG_PLL_ENET_TOG:
|
|
case CCM_ANALOG_PFD_480_TOG:
|
|
case CCM_ANALOG_PFD_528_TOG:
|
|
case CCM_ANALOG_MISC0_TOG:
|
|
case PMU_MISC1_TOG:
|
|
case CCM_ANALOG_MISC2_TOG:
|
|
case USB_ANALOG_USB1_VBUS_DETECT_TOG:
|
|
case USB_ANALOG_USB1_CHRG_DETECT_TOG:
|
|
case USB_ANALOG_USB1_MISC_TOG:
|
|
case USB_ANALOG_USB2_VBUS_DETECT_TOG:
|
|
case USB_ANALOG_USB2_CHRG_DETECT_TOG:
|
|
case USB_ANALOG_USB2_MISC_TOG:
|
|
/*
|
|
* All REG_NAME_TOG register access are in fact targeting the
|
|
* the REG_NAME register. So we change the value of the
|
|
* REG_NAME register, toggling bits passed in the value.
|
|
*/
|
|
s->analog[index - 3] ^= value;
|
|
break;
|
|
default:
|
|
/*
|
|
* We will do a better implementation later. In particular some bits
|
|
* cannot be written to.
|
|
*/
|
|
s->analog[index] = value;
|
|
break;
|
|
}
|
|
}
|
|
|
|
static const struct MemoryRegionOps imx6_ccm_ops = {
|
|
.read = imx6_ccm_read,
|
|
.write = imx6_ccm_write,
|
|
.endianness = DEVICE_NATIVE_ENDIAN,
|
|
.valid = {
|
|
/*
|
|
* Our device would not work correctly if the guest was doing
|
|
* unaligned access. This might not be a limitation on the real
|
|
* device but in practice there is no reason for a guest to access
|
|
* this device unaligned.
|
|
*/
|
|
.min_access_size = 4,
|
|
.max_access_size = 4,
|
|
.unaligned = false,
|
|
},
|
|
};
|
|
|
|
static const struct MemoryRegionOps imx6_analog_ops = {
|
|
.read = imx6_analog_read,
|
|
.write = imx6_analog_write,
|
|
.endianness = DEVICE_NATIVE_ENDIAN,
|
|
.valid = {
|
|
/*
|
|
* Our device would not work correctly if the guest was doing
|
|
* unaligned access. This might not be a limitation on the real
|
|
* device but in practice there is no reason for a guest to access
|
|
* this device unaligned.
|
|
*/
|
|
.min_access_size = 4,
|
|
.max_access_size = 4,
|
|
.unaligned = false,
|
|
},
|
|
};
|
|
|
|
static void imx6_ccm_init(Object *obj)
|
|
{
|
|
DeviceState *dev = DEVICE(obj);
|
|
SysBusDevice *sd = SYS_BUS_DEVICE(obj);
|
|
IMX6CCMState *s = IMX6_CCM(obj);
|
|
|
|
/* initialize a container for the all memory range */
|
|
memory_region_init(&s->container, OBJECT(dev), TYPE_IMX6_CCM, 0x5000);
|
|
|
|
/* We initialize an IO memory region for the CCM part */
|
|
memory_region_init_io(&s->ioccm, OBJECT(dev), &imx6_ccm_ops, s,
|
|
TYPE_IMX6_CCM ".ccm", CCM_MAX * sizeof(uint32_t));
|
|
|
|
/* Add the CCM as a subregion at offset 0 */
|
|
memory_region_add_subregion(&s->container, 0, &s->ioccm);
|
|
|
|
/* We initialize an IO memory region for the ANALOG part */
|
|
memory_region_init_io(&s->ioanalog, OBJECT(dev), &imx6_analog_ops, s,
|
|
TYPE_IMX6_CCM ".analog",
|
|
CCM_ANALOG_MAX * sizeof(uint32_t));
|
|
|
|
/* Add the ANALOG as a subregion at offset 0x4000 */
|
|
memory_region_add_subregion(&s->container, 0x4000, &s->ioanalog);
|
|
|
|
sysbus_init_mmio(sd, &s->container);
|
|
}
|
|
|
|
static void imx6_ccm_class_init(ObjectClass *klass, void *data)
|
|
{
|
|
DeviceClass *dc = DEVICE_CLASS(klass);
|
|
IMXCCMClass *ccm = IMX_CCM_CLASS(klass);
|
|
|
|
dc->reset = imx6_ccm_reset;
|
|
dc->vmsd = &vmstate_imx6_ccm;
|
|
dc->desc = "i.MX6 Clock Control Module";
|
|
|
|
ccm->get_clock_frequency = imx6_ccm_get_clock_frequency;
|
|
}
|
|
|
|
static const TypeInfo imx6_ccm_info = {
|
|
.name = TYPE_IMX6_CCM,
|
|
.parent = TYPE_IMX_CCM,
|
|
.instance_size = sizeof(IMX6CCMState),
|
|
.instance_init = imx6_ccm_init,
|
|
.class_init = imx6_ccm_class_init,
|
|
};
|
|
|
|
static void imx6_ccm_register_types(void)
|
|
{
|
|
type_register_static(&imx6_ccm_info);
|
|
}
|
|
|
|
type_init(imx6_ccm_register_types)
|