qemu-e2k/tcg/riscv
Richard Henderson 9b246685b3 tcg/riscv: Fix reg overlap case in tcg_out_addsub2
There was a typo using opc_addi instead of opc_add with the
two registers.  While we're at it, simplify the gating test
to al == bl to improve dynamic scheduling even when the
output register does not overlap the inputs.

Reported-by: LIU Zhiwei <zhiwei_liu@linux.alibaba.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Message-Id: <20221020233836.2341671-1-richard.henderson@linaro.org>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
2023-01-06 10:42:55 +10:00
..
tcg-target-con-set.h
tcg-target-con-str.h
tcg-target.c.inc tcg/riscv: Fix reg overlap case in tcg_out_addsub2 2023-01-06 10:42:55 +10:00
tcg-target.h tcg/riscv: Support raising sigbus for user-only 2022-02-09 08:55:02 +11:00