253 lines
6.2 KiB
C
253 lines
6.2 KiB
C
/*
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* Bit-Bang i2c emulation extracted from
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* Marvell MV88W8618 / Freecom MusicPal emulation.
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*
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* Copyright (c) 2008 Jan Kiszka
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*
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* This code is licensed under the GNU GPL v2.
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*
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* Contributions after 2012-01-13 are licensed under the terms of the
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* GNU GPL, version 2 or (at your option) any later version.
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*/
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#include "hw/hw.h"
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#include "bitbang_i2c.h"
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#include "hw/sysbus.h"
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//#define DEBUG_BITBANG_I2C
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#ifdef DEBUG_BITBANG_I2C
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#define DPRINTF(fmt, ...) \
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do { printf("bitbang_i2c: " fmt , ## __VA_ARGS__); } while (0)
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#else
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#define DPRINTF(fmt, ...) do {} while(0)
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#endif
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typedef enum bitbang_i2c_state {
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STOPPED = 0,
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SENDING_BIT7,
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SENDING_BIT6,
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SENDING_BIT5,
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SENDING_BIT4,
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SENDING_BIT3,
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SENDING_BIT2,
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SENDING_BIT1,
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SENDING_BIT0,
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WAITING_FOR_ACK,
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RECEIVING_BIT7,
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RECEIVING_BIT6,
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RECEIVING_BIT5,
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RECEIVING_BIT4,
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RECEIVING_BIT3,
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RECEIVING_BIT2,
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RECEIVING_BIT1,
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RECEIVING_BIT0,
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SENDING_ACK,
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SENT_NACK
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} bitbang_i2c_state;
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struct bitbang_i2c_interface {
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i2c_bus *bus;
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bitbang_i2c_state state;
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int last_data;
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int last_clock;
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int device_out;
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uint8_t buffer;
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int current_addr;
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};
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static void bitbang_i2c_enter_stop(bitbang_i2c_interface *i2c)
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{
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DPRINTF("STOP\n");
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if (i2c->current_addr >= 0)
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i2c_end_transfer(i2c->bus);
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i2c->current_addr = -1;
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i2c->state = STOPPED;
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}
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/* Set device data pin. */
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static int bitbang_i2c_ret(bitbang_i2c_interface *i2c, int level)
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{
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i2c->device_out = level;
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//DPRINTF("%d %d %d\n", i2c->last_clock, i2c->last_data, i2c->device_out);
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return level & i2c->last_data;
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}
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/* Leave device data pin unodified. */
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static int bitbang_i2c_nop(bitbang_i2c_interface *i2c)
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{
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return bitbang_i2c_ret(i2c, i2c->device_out);
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}
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/* Returns data line level. */
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int bitbang_i2c_set(bitbang_i2c_interface *i2c, int line, int level)
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{
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int data;
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if (level != 0 && level != 1) {
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abort();
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}
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if (line == BITBANG_I2C_SDA) {
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if (level == i2c->last_data) {
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return bitbang_i2c_nop(i2c);
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}
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i2c->last_data = level;
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if (i2c->last_clock == 0) {
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return bitbang_i2c_nop(i2c);
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}
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if (level == 0) {
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DPRINTF("START\n");
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/* START condition. */
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i2c->state = SENDING_BIT7;
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i2c->current_addr = -1;
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} else {
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/* STOP condition. */
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bitbang_i2c_enter_stop(i2c);
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}
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return bitbang_i2c_ret(i2c, 1);
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}
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data = i2c->last_data;
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if (i2c->last_clock == level) {
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return bitbang_i2c_nop(i2c);
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}
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i2c->last_clock = level;
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if (level == 0) {
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/* State is set/read at the start of the clock pulse.
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release the data line at the end. */
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return bitbang_i2c_ret(i2c, 1);
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}
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switch (i2c->state) {
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case STOPPED:
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case SENT_NACK:
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return bitbang_i2c_ret(i2c, 1);
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case SENDING_BIT7 ... SENDING_BIT0:
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i2c->buffer = (i2c->buffer << 1) | data;
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/* will end up in WAITING_FOR_ACK */
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i2c->state++;
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return bitbang_i2c_ret(i2c, 1);
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case WAITING_FOR_ACK:
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if (i2c->current_addr < 0) {
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i2c->current_addr = i2c->buffer;
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DPRINTF("Address 0x%02x\n", i2c->current_addr);
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i2c_start_transfer(i2c->bus, i2c->current_addr >> 1,
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i2c->current_addr & 1);
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} else {
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DPRINTF("Sent 0x%02x\n", i2c->buffer);
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i2c_send(i2c->bus, i2c->buffer);
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}
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if (i2c->current_addr & 1) {
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i2c->state = RECEIVING_BIT7;
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} else {
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i2c->state = SENDING_BIT7;
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}
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return bitbang_i2c_ret(i2c, 0);
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case RECEIVING_BIT7:
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i2c->buffer = i2c_recv(i2c->bus);
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DPRINTF("RX byte 0x%02x\n", i2c->buffer);
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/* Fall through... */
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case RECEIVING_BIT6 ... RECEIVING_BIT0:
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data = i2c->buffer >> 7;
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/* will end up in SENDING_ACK */
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i2c->state++;
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i2c->buffer <<= 1;
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return bitbang_i2c_ret(i2c, data);
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case SENDING_ACK:
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i2c->state = RECEIVING_BIT7;
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if (data != 0) {
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DPRINTF("NACKED\n");
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i2c->state = SENT_NACK;
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i2c_nack(i2c->bus);
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} else {
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DPRINTF("ACKED\n");
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}
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return bitbang_i2c_ret(i2c, 1);
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}
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abort();
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}
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bitbang_i2c_interface *bitbang_i2c_init(i2c_bus *bus)
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{
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bitbang_i2c_interface *s;
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s = g_malloc0(sizeof(bitbang_i2c_interface));
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s->bus = bus;
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s->last_data = 1;
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s->last_clock = 1;
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s->device_out = 1;
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return s;
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}
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/* GPIO interface. */
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#define TYPE_GPIO_I2C "gpio_i2c"
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#define GPIO_I2C(obj) OBJECT_CHECK(GPIOI2CState, (obj), TYPE_GPIO_I2C)
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typedef struct GPIOI2CState {
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SysBusDevice parent_obj;
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MemoryRegion dummy_iomem;
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bitbang_i2c_interface *bitbang;
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int last_level;
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qemu_irq out;
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} GPIOI2CState;
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static void bitbang_i2c_gpio_set(void *opaque, int irq, int level)
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{
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GPIOI2CState *s = opaque;
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level = bitbang_i2c_set(s->bitbang, irq, level);
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if (level != s->last_level) {
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s->last_level = level;
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qemu_set_irq(s->out, level);
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}
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}
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static int gpio_i2c_init(SysBusDevice *sbd)
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{
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DeviceState *dev = DEVICE(sbd);
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GPIOI2CState *s = GPIO_I2C(dev);
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i2c_bus *bus;
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memory_region_init(&s->dummy_iomem, OBJECT(s), "gpio_i2c", 0);
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sysbus_init_mmio(sbd, &s->dummy_iomem);
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bus = i2c_init_bus(dev, "i2c");
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s->bitbang = bitbang_i2c_init(bus);
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qdev_init_gpio_in(dev, bitbang_i2c_gpio_set, 2);
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qdev_init_gpio_out(dev, &s->out, 1);
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return 0;
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}
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static void gpio_i2c_class_init(ObjectClass *klass, void *data)
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{
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DeviceClass *dc = DEVICE_CLASS(klass);
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SysBusDeviceClass *k = SYS_BUS_DEVICE_CLASS(klass);
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k->init = gpio_i2c_init;
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set_bit(DEVICE_CATEGORY_BRIDGE, dc->categories);
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dc->desc = "Virtual GPIO to I2C bridge";
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}
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static const TypeInfo gpio_i2c_info = {
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.name = TYPE_GPIO_I2C,
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.parent = TYPE_SYS_BUS_DEVICE,
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.instance_size = sizeof(GPIOI2CState),
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.class_init = gpio_i2c_class_init,
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};
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static void bitbang_i2c_register_types(void)
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{
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type_register_static(&gpio_i2c_info);
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}
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type_init(bitbang_i2c_register_types)
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