qemu-e2k/target-ppc
Tom Musta 76cb658419 target-ppc: Altivec's mtvscr Decodes Wrong Register
The Move to Vector Status and Control Register (mtvscr) instruction
uses VRB as the source register.  Fix the code generator to correctly
decode the VRB field.  That is, use "rB(ctx->opcode)" instead of
"rD(ctx->opcode)".

Signed-off-by: Tom Musta <tommusta@gmail.com>
Signed-off-by: Alexander Graf <agraf@suse.de>
2014-11-20 14:52:01 +01:00
..
arch_dump.c
cpu-models.c target-ppc : Add new processor type 440x5wDFPU 2014-11-04 23:26:12 +01:00
cpu-models.h
cpu-qom.h target-ppc: Use cpu_exec_interrupt qom hook 2014-09-25 18:54:22 +01:00
cpu.h target-ppc: Use macros in opcodes table handling code 2014-11-04 23:26:12 +01:00
dfp_helper.c
excp_helper.c target-ppc: Use cpu_exec_interrupt qom hook 2014-09-25 18:54:22 +01:00
fpu_helper.c target-ppc : Allow fc[tf]id[*] mnemonics for non TARGET_PPC64 2014-11-04 23:26:11 +01:00
gdbstub.c
helper_regs.h
helper.h target-ppc : Allow fc[tf]id[*] mnemonics for non TARGET_PPC64 2014-11-04 23:26:11 +01:00
int_helper.c target-ppc: Fix vcmpbfp. Unordered Case 2014-11-04 23:26:15 +01:00
kvm_ppc.c
kvm_ppc.h
kvm-stub.c
kvm.c target-ppc: kvm: Fix memory overflow issue about strncat() 2014-11-04 23:26:13 +01:00
machine.c
Makefile.objs
mem_helper.c
mfrom_table_gen.c
mfrom_table.c
misc_helper.c
mmu_helper.c
mmu-hash32.c
mmu-hash32.h
mmu-hash64.c
mmu-hash64.h
STATUS
timebase_helper.c
translate_init.c target-ppc: Fix breakpoint registers for e300 2014-11-20 14:52:01 +01:00
translate.c target-ppc: Altivec's mtvscr Decodes Wrong Register 2014-11-20 14:52:01 +01:00
user_only_helper.c